6. Rabbit Internal I/O Registers

Table 6-1. Rabbit Internal I/O Registers 

Address	Reset Value	Functionality
GCSR=00h	11000000	Global Control Status Register. Control of clocks, periodic interrupts, and monitoring of watchdog. See Table 7-1.
RTCCR=01h	00000000	Real-Time Clock Control Register. See Section 7.5, "Time/Date Clock (Real-Time Clock)."
RTC0R=02h	xxxxxxxx	Real-Time Clock Byte 0 Register.
RTC1R=03h	xxxxxxxx	Real-Time Clock Byte 1 Register.
RTC2R=04h	xxxxxxxx	Real-Time Clock Byte 2 Register.
RTC3R=05h	xxxxxxxx	Real-Time Clock Byte 3 Register.
RTC4R=06h	xxxxxxxx	Real-Time Clock Byte 4 Register.
RTC5R=07h	xxxxxxxx	Real-Time Clock Byte 5 Register.
WDTCR=08h	00000000	Watchdog Timer Control Register. See Section 7.6, "Watchdog Timer."
WDTTR=09h	00000000	Watchdog Timer Test Register.
GOCR=0Eh	00000x00	Global Output Control Register. See Section 7.4, "Output Pins CLK, STATUS, /WDTOUT, /BUFEN.".
GCDR=0Fh	xxxxx000	Global Clock Doubler Register.
MMIDR=10h	xxx00000	Memory Management I and D Space Register. Controls I & D space enable and battery switchover support for /CS1.
XPC	00000000	Not an I/O register, but initialized to zero by reset.
STACKSEG=11h (Z180 CBR)	00000000	Stack segment memory pointer. Locates stack segment in physical memory.
DATASEG=12h (Z180 BBR)	00000000	Data segment memory pointer. Locates data segment in physical memory.
SEGSIZE=13h (Z180 CBAR)	11111111	Specifies start of data segment and start of stack segment in 64K memory space.
MB0CR=14h	00000000	Memory Bank 0 Control Register. Controls mapping of first memory quadrant 256K to physical memory chips.
MB1CR=15h	xxxxxxxx	Memory Bank 1 Control Register. Controls mapping of second memory quadrant to physical memory chips.
MB2CR=16h	xxxxxxxx	Memory Bank 2 Control Register. Controls mapping of third memory quadrant to physical memory chips.
MB3CR=17h	xxxxxxxx	Memory Bank 3 Control Register. Controls mapping of fourth memory quadrant to physical memory chips.
SPD0R=20h	xxxxxxxx	Slave Port Register 0. Separate registers for read and write used for slave port communication.
SPD1R=21h	xxxxxxxx	Slave port register 1.
SPD2R=22h	xxxxxxxx	Slave port register 2.
SPSR=023h	00000000	Slave port status register.
SPCR=24h	000x0000	Slave port control register.
PADR=30h	xxxxxxxx	Parallel port A data register. R/W.
PBDR=40h	00xxxxxx	Parallel port B data register. R/W.
PCDR=50h	x0x0x0x0	Parallel port C data register.
PCFR=55h	x0x0x0x0	Port C function register.
PDDR=60h	xxxxxxxx	Parallel port D data register. R/W.
PDCR=64h	xx00xx00	Port D control register
PDFR=65h	xxxxxxxx	Port D function register.
PDDCR=66h	xxxxxxxx	Port D drive control register.
PDDDR=67h	00000000	Port D data direction register.
PDB0R=68h	xxxxxxxx	Port D bit 0 register. W
PDB1R=69h	xxxxxxxx	Bit 1.
PDB2R=6Ah	xxxxxxxx	Bit 2.
PDB3R=6Bh	xxxxxxxx	Bit 3.
PDB4R=6Ch	xxxxxxxx	Bit 4.
PDB5R=6Dh	xxxxxxxx	Bit 5.
PDB6R=6Eh	xxxxxxxx	Bit 6.
PDB7R=6Fh	xxxxxxxx	Bit 7.
PEDR=70h	xxxxxxxx	Parallel port E data register. R/W.
PECR=74h	xx00xx00	Port E control register.
PEFR=75h	xxxxxxx	Port E function register.
PEDDR=77h	0000000	Port E data direction register.
PEB0R=78h	xxxxxxx	Port E bit 0 register. W
PEB1R=79h	xxxxxxx	Bit 1.
PEB2R=7Ah	xxxxxxx	Bit 2.
PEB3R=7Bh	xxxxxxx	Bit 3.
PEB4R=7Ch	xxxxxxx	Bit 4.
PEB5R=7Dh	xxxxxxx	Bit 5.
PEB6R=7Eh	xxxxxxx	Bit 6.
PEB7R=7FH	xxxxxxx	Bit 7
IB0CR=80h	00000xxx	External I/O control bank 0
IB1CR=81h	00000xxx	External I/O control bank 1
IB2CR=82h	00000xxx	External I/O control bank 2
IB3CR=83h	00000xxx	External I/O control bank 3
IB4CR=84h	00000xxx	External I/O control bank 4
IB5CR=85h	00000xxx	External I/O control bank 5
IB6CR=86h	00000xxx	External I/O control bank 6
IB7CR=87h	00000xxx	External I/O control bank 7
I0CR=98h	xx000000	External interrupt 0 control register.
I1CR=99h	xx000000	External interrupt 1 control register.
TACSR=0A0h	0000xx00	Timer A Control/Status Register
TACR=0A4h	xxxxxxxx	Timer A Control Register
TAT1R=0A3h	0000xx00	Timer A1 Time Constant 1 Register
TAT4R=0A9h	xxxxxxxx	Timer A4 Time Constant 4 Register
TAT5R=0ABh	xxxxxxxx	Timer A5 Time Constant 5 Register
TAT6R=0ADh	xxxxxxxx	Timer A6 Time Constant 6 Register
TAT7R=0AFh	xxxxxxxx	Timer A7 Time Constant 7 Register
TBCSR=0B0h	xxxxx000	Timer B Control/Status Register
TBCR=0B1h	xxxx0000	Timer B Control Register
TBM1R=0B2h	xxxxxxxx	Timer B MSB 1 Reg
TBL1R=0B3h	xxxxxxxx	Timer B LSB 1 Reg
TBM2R=0B4h	xxxxxxxx	Timer B MSB 2 Reg
TBL2R=0B5h	xxxxxxxx	Timer B LSB 2 Reg
TBCMR=0BEh	xxxxxxxx	Timer B Count MSB Reg
TBCLR=0BFh	xxxxxxxx	Timer B Count LSB Reg
SADR=0C0h	xxxxxxxx	Serial port A data register receive/send.
SAAR=0C1h	xxxxxxxx	Serial port A alternate data register (transmit 9th bit)
SASR=0C3h	0xx00000	Serial port A status register.
SACR=0C4h	xx000000	Serial port A control register.
SBDR=0D0h	xxxxxxxx	Serial port B data register receive/send.
SBAR=0D1h	xxxxxxxx	Serial port B alternate data register (transmit 9th bit)
SBSR=0D3h	0xx00000	Serial port B status register.
SBCR=0D4h	xx000000	Serial port B control register.
SCDR=0E0h	xxxxxxxx	Serial port C data register receive/send.
SCAR=0E1h	xxxxxxxx	Serial port C alternate data register (transmit 9th bit)
SCSR=0E3h	0xx00000	Serial port C status register.
SCCR=0E4h	xx00x000	Serial port C control register.
SDDR=0F0h	xxxxxxxx	Serial port D data register receive/send.
SDAR=0F1h	xxxxxxxx	Serial port D alternate data register (transmit 9th bit)
SDSR=0F3h	0xx00000	Serial port D status register.
SDCR=0F4h	xx00x000	Serial port D control register.