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Chapter 1. Definitions and Conventions

This chapter describes the formatting of information that explains the Rabbit assembly instructions. The symbols and condition codes used in the instruction mnemonics are listed and described. At the end of the chapter is a short list of definitions.

1.1 Instruction Table Key

For the most part, you will find three tables that explain an instruction. The Instruction table is defined by the following columns:

• Opcode: A hexadecimal representation of the value that the mnemonic instruction represents.
• Instruction: The mnemonic syntax of the instruction.
• Operation: A symbolic representation of the operation performed.

1.2 Clocks Table Key

The Clocks table states the number of clock cycles it takes to complete this instruction. The number of clocks instructions take follows a general pattern. There are several Rabbit instructions that do not adhere to this pattern. Some instructions take more clocks and some have been enhanced to take fewer clocks.

The clocking of every instruction is affected by the type of memory access enabled for instruction fetches. The Rabbit 2000 and 3000 only allow 8-bit memory accesses for fetching instructions, while the Rabbit 4000 and 5000 allow either 8-bit or 16-bit memory accesses. Since the Rabbit processors have instructions of various lengths, part of the instruction may be unaligned with the 16-bit memory alignment, so instruction clocks are listed for instructions when they either start on a 16-bit boundary (even address, or aligned) or not (odd address, or unaligned).

Table 1: Typical Clocks Breakdown

Process	Clocks
Each byte of the opcode	2
Each data byte read	2
Write to memory or external IO	3
Write to internal IO	2
Internal operation or computation	1

1.3 Flags, ALTD, and IOI/IOE Table Keys

The second table for an instruction identifies how executing that instruction affects the flags register and also how the instruction is affected by the instruction prefixes ALTD, IOI and IOE.

Table 2: Flag Register Key

S	Z	L/V	C	Description
·				Sign flag affected; set if result is negative, cleared if result is positive
-				Sign flag not affected
	·			Zero flag affected; set if result is zero, cleared if result is not zero.
	-			Zero flag not affected
		L		Logical/Overflow flag contains logical check result; set if result is one, cleared if result is zero.
		V		Logical/Overflow flag set on arithmetic overflow result, cleared if there was no arithmetic overflow
		0		Logical/Overflow flag is cleared
		·		Logical/Overflow flag is affected
			·	Carry flag is affected
			-	Carry flag is not affected
			0	Carry flag is cleared
			1	Carry flag is set

Table 3: ALTD ("A" Column) Symbol Key

Flag			Description
F	R	SP
·			ALTD selects alternate flags
	·		ALTD selects alternate destination register
		·	ALTD operation is a special case

Table 4: IOI and IOE ("I" Column) Symbol Key

Flag		Description
S	D
·		IOI and IOE affect source
	·	IOI and IOE affect destination

1.4 Memory Modes

There are two memory modes available in the Rabbit 2000 and Rabbit 3000: logical and physical. The Rabbit 4000 and newer Rabbit processors have three memory modes: logical, physical and pointer indirect.

1.5 Instruction Symbols Key

This table describes the symbols used in the instruction descriptions.

Table 5: Symbols Used in Instruction Descriptions

Symbol	Symbol Meaning
b	Bit select (000 = bit 0, 001 = bit 1, 010 = bit 2, 011 = bit 3, 100 = bit 4, 101 = bit 5, 110 = bit 6, 111 = bit 7)
bb	Determines number of times (1, 2 or 4) to repeat certain rotate and shift instructions.
cc	Condition code select (00 = NZ, 01 = Z, 10 = NC, 11 = C)
cx	Condition code select (00 = GT, 01 = GTU, 10 = LT, 11 = V
d	8-bit signed integer, in the range [-128, 127]. Expressed in two's complement.
dd	16-bit register select-destination (00 = BC, 01 = DE, 10 = HL, 11 = SP)
dd'	16-bit register select-alternate(00 = BC', 01 = DE', 10 = HL')
e1	8-bit signed displacement in the range [-128, 127] added to PC
ee2	16-bit signed displacement in the range [-32768, 32767] added to PC
f	Condition code select (000 = NZ, 001 = Z, 010 = NC, 011 = C, 100 = LZ/NV, 101 = LO/V, 110 = P, 111 = M)
m	Most significant bits (MSB) of a 16-bit constant
mn	16-bit constant
lmn	24-bit constant
lxpc	12-bit XPC
n	8-bit constant or the least significant bits (LSB) of a 16-bit constant
ps, pd	32-bit register select: 1000 = PW, 1001 = PX, 1010 = PY, 1011 = PZ
pp	32-bit register select: 00 = PW, 01 = PX 10 = PY, 11 = PZ
r, g	8-bit register select: 000 = B, 001 = C, 010 = D, 011 = E, 100 = H, 101 = L, 111 = A
rr	16-bit register select:            00 = BC, 01 = DE, 10 = IX, 11 = IY
ss	16-bit register select-source: 00 = BC, 01 = DE, 10 = HL, 11 = SP
v	Restart address select: 010 = 0020h, 011 = 0030h, 100 = 0040h, 101 = 0050h, 111 = 0070h
x	8-bit constant to load into the XPC
xx	16-bit register select: 00 = BC, 01 = DE, 10 = IX, 11 = SP
yy	16-bit register select: 00 = BC, 01 = DE, 10 = IY, 11 = SP
zz	16-bit register select: 00 = BC, 01 = DE, 10 = HL, 11 = AF

1 The assembler translates a 16-bit constant or label to the 8-bit signed displacement. 2 The assembler translates a 16-bit constant or label to the 16-bit signed displacement.

1.6 Condition Codes

This section describes the condition codes you will see in Rabbit instructions or that are recognized by the Rabbit assembler.

Table 6: Condition Code Descriptions

Condition	Flag Bit Value	Description
NZ, NEQ	Z=0	The "Not Zero" or "Not Equal" condition is true if the result of the operation is not zero. By convention, NZ is used in conjunction with instructions like the BIT instruction and NEQ is more appropriate in conjunction with compare instructions.
Z, EQ	Z=1	The "Zero" or "Equal" condition is true if the result of the operation is zero. By convention, Z is used in conjunction with instructions like the BIT instruction and EQ is more appropriate in conjunction with compare instructions.
NC	C=0	The "No Carry" condition is true if the operation does not cause a carry.
C, LTU	C=1	The "Carry" condition is true if the operation causes a carry.
GT	(Z or (S xor V))=0	The "Greater Than" condition is true if the Z flag is zero and the L/V flag and the S flag are either both one or both zero.
LT	(S xor V)=1	The "Less Than" condition is true when the S flag is one and there is no arithmetic overflow (L/V=0); or the S flag is zero and there is arithmetic overflow (L/V=1).
GTU	((C=0) and (Z=0))=1	The "Greater Than Unsigned" condition is true if the C flag and Z flag are both zero.
P	S=0	The "Positive" condition is true if the S flag is zero.
M	S=1	The "Minus" condition is true if the S flag is one.
LZ	L/V=0	The "Logic Zero" condition is true if all of the four most significant bits of the operation's result are zero.
LO	L/V=1	The "Logic One" condition is true if one or more of the four most significant bits of the operation's result are one.
NV	L/V=0	The "No Overflow" condition is true if the arithmentic operation causes no overflow
V	L/V=1	The "Overflow" condition is true if the arithmentic operation causes an overflow

1.7 Definitions

This section defines some symbols, terms and representations that are used in this manual.

@PC

16-bit constant for the current code location.

CF

Represents the carry flag. The letter "C" also represents the carry flag, but only in the table heading that describes the bits in the flags register; otherwise, it represents the 8-bit Rabbit register.

Arithmetic Overflow

An arithmetic overflow happens when the result of an arithmetic operation is larger than the register or memory location in which it is stored. The Rabbit sets the overflow flag "V" when this happens.

Atomic

Describes an operation that is indivisible. It must happen completely or not at all. All Rabbit instructions are atomic except for the move instructions (LDDR, etc.) that are interruptible between iterations. Some are "chained-atomic," meaning that the instruction's atomicity is extended to the instruction immediately following it.

Little Endian

This is the byte-ordering method used by the Rabbit microprocessor. Numbers are stored low-byte first. You will see evidence of this in the opcode of instructions that take a multi-byte value; e.g., the opcode for the instruction "JP mn" is "C3 n m" where the low-byte of the 16-bit constant comes before the high-byte.

Long Logical Address

This is a 32-bit address (0xFFFFxxxx) that is treated as a logical address, i.e., it is passed through the MMU for translation. The upper 16 bits are all ones. Only the lower 16 bits are significant.

Shift Operations

The Rabbit has shift left and shift right instructions. Most of the shift instructions work on bits, but some (RLA and RRA) work at the byte level. Basically, a bit-level left shift accomplishes a multiply by 2 and a bit-level right shift does integer division by 2.

Bitwise shift operations are further distinquished by logical and arithmetic variations. For left shifts, there is no functional difference between a logical and arithmetic shift. However, for right shifts there is a difference: logical right shifts shift in a zero to the high-order bit, whereas for arithmetic right shifts, the high-bit is sign-extended.

Signed and Unsigned

Signed numbers can be either positive or negative. The high bit is the sign bit. A "1" means the number is negative; a "0" means it is positive.

Unsigned numbers are always positive. The benefit of using unsigned is that it doubles the number of unique positive numbers available.

Two's Complement

Integer representation method that makes the circuitry for addition and subtraction less complex. The Rabbit uses two's complement. This means that all negative integers have a "1" in their high bit. For example, let's say the integer is -2. To find its two's complement representation you take the binary representation of 2, then invert all the bits and add one. The binary representation of 2 is: 0000 0010; inverting the bits gives: 1111 1101; and adding one: 1111 1110; which is 0xFE in hex. So, 0xFE is the two's complement representation of -2.