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> LD pd,ps+HL Load Rabbit 4000 Instruction

> Opcode | Instruction | Clocks | Operation
> -- | LD pd,ps+HL | 4 (2,2) | pd = ps + HL
> 6D 0E | LD PW,PW+HL | 4 (2,2) | PW = PW + HL
> 6D 1E | LD PW,PX+HL | PW = PX + HL
> 6D 2E | LD PW,PY+HL | PW = PY + HL
> 6D 3E | LD PW,PZ+HL | PW = PZ + HL
> 6D 4E | LD PX,PW+HL | 4 (2,2) | PX = PW + HL
> 6D 5E | LD PX,PX+HL | PX = PX + HL
> 6D 6E | LD PX,PY+HL | PX = PY + HL
> 6D 7E | LD PX,PZ+HL | PX = PZ + HL
> 6D 8E | LD PY,PW+HL | 4 (2,2) | PY = PW + HL
> 6D 9E | LD PY,PX+HL | PY = PX + HL
> 6D AE | LD PY,PY+HL | PY = PY + HL
> 6D BE | LD PY,PZ+HL | PY = PZ + HL
> 6D CE | LD PZ,PW+HL | 4 (2,2) | PZ = PW + HL
> 6D DE | LD PZ,PX+HL | PZ = PX + HL
> 6D EE | LD PZ,PY+HL | PZ = PY + HL
> 6D FE | LD PZ,PZ+HL | PZ = PZ + HL

> Flags | ALTD | IOI/IOE
> S | Z | L/V | C | F | R | SP | S | D
> - | - | - | - |  | · |  |  |

> #### Description

> Loads pd (any of the 32-bit registers PW, PX, PY or PZ) with the sum of ps (any of PW, PX, PY or PZ) and HL. These instructions cannot be used for general 32-bit arithmetic because the addition depends on the upper two bytes of ps. If the upper two bytes are all ones, then it is 16-bit addition. The following example illustrates this point:

>     ld PW,0xFFFFFFFF
>     ld PW,PW+HL            ;yields PW=0xFFFF0000 if HL=1

>     ld PW,0x7FFFFFFF
>     ld PW,PW+HL            ;yields PW=0x80000000 if HL=1

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