RabbitCore RCM2200 User's Manual

> ## Appendix C. Power Supply

> Appendix C provides information on the current requirements of the RCM2200, and includes some background on the chip select circuit used in power management.

> ### C.1 Power Supplies

> The RCM2200 requires a regulated 5 V ± 0.25 V DC power source. The RabbitCore design presumes that the voltage regulator is on the user board, and that the power is made available to the RabbitCore board through headers J4 and J5.

> An RCM2200 with no loading at the outputs operating at 22.1 MHz typically draws 134 mA. The RCM2200 will consume an additional 10 mA when the programming cable is used to connect the programming header, J1, to a PC.

> #### C.1.1 Battery-Backup Circuits

> The RCM2200 does not have a battery, but there is provision for a customer-supplied battery to back up SRAM and keep the internal Rabbit 2000 real-time clock running.

> Header J5, shown in Figure C-1, allows access to the external battery. This header makes it possible to connect an external 3 V power supply. This allows the SRAM and the internal Rabbit 2000 real-time clock to retain data with the RCM2200 powered down.

> Figure C-1. External Battery Connections
> at Header J5

> A lithium battery with a nominal voltage of 3 V and a minimum capacity of 165 mA·h is recommended. A lithium battery is strongly recommended because of its nearly constant nominal voltage over most of its life.

> The drain on the battery by the RCM2200 is typically 16 µA when no other power is supplied. If a 950 mA·h battery is used, the battery can last more than 6 years:

> The actual life in your application will depend on the current drawn by components not on the RCM2200 and the storage capacity of the battery. Note that the shelf life of a lithium ion battery is ultimately 10 years. The RCM2200 does not drain the battery while it is powered up normally.

> The battery-backup circuit serves three purposes:

> - It reduces the battery voltage to the SRAM and to the real-time clock, thereby limiting the current consumed by the real-time clock and lengthening the battery life.

> - It ensures that current can flow only out of the battery to prevent charging the battery.

> - A voltage, VOSC, is supplied to U6, which keeps the 32.768 kHz oscillator working when the voltage begins to drop.

> VRAM and Vcc are nearly equal (<100 mV, typically 10 mV) when power is supplied to the RCM2200.

> Figure C-2 shows the RCM2200 battery-backup circuit.

> Figure C-2. RCM2200 Battery-Backup Circuit

> #### C.1.2 Reset Generator

> The RCM2200 uses a reset generator, U1, to reset the Rabbit 2000 microprocessor when the voltage drops below the voltage necessary for reliable operation. The reset occurs between 4.50 V and 4.75 V, typically 4.63 V. The RCM2200 has a reset output, pin 9 on header J5.

> ### C.2 Chip Select Circuit

> The RCM2100 has provision for battery backup, which kicks in to keep VRAM from dropping below 2 V.

> When the RCM2200 is not powered, the battery keeps the SRAM memory contents and the real-time clock (RTC) going. The SRAM has a powerdown mode that greatly reduces power consumption. This powerdown mode is activated by raising the chip select (CS) signal line. Normally the SRAM requires Vcc to operate. However, only 2 V is required for data retention in powerdown mode. Thus, when power is removed from the circuit, the battery voltage needs to be provided to both the SRAM power pin and to the CS signal line. The CS control switch accomplishes this task for the CS signal line.

> Figure C-3 shows a schematic of the chip select control switch.

> Figure C-3. Chip Select Control Switch

> In a powered-up condition, the CS control switch must allow the processor's chip select signal /CS1 to control the SRAM's CS signal /CSRAM. So, with power applied, /CSRAM must be the same signal as /CS1, and with power removed, /CSRAM must be held high (but only needs to be as high as the battery voltage). Q3 and Q4 are MOSFET transistors with opposing polarity. They are both turned on when power is applied to the circuit. They allow the CS signal to pass from the processor to the SRAM so that the processor can periodically access the SRAM. When power is removed from the circuit, the transistors will turn off and isolate /CSRAM from the processor. The isolated /CSRAM line has a 100 kW pullup resistor to VRAM (R28). This pullup resistor keeps /CSRAM at the VRAM voltage level (which under no power condition is the backup battery's regulated voltage at a little more than 2 V).

> Transistors Q3 and Q4 are of opposite polarity so that a rail-to-rail voltages can be passed. When the /CS1 voltage is low, Q3 will conduct. When the /CS1 voltage is high, Q4 will conduct. It takes time for the transistors to turn on, creating a propagation delay. This delay is typically very small, about 10 ns to 15 ns.

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