RabbitCore RCM2100 User's Manual

> ## Appendix C. Power Supply

> Appendix C provides information on the current and power supply requirements of the RCM2100, and some background on the chip select and battery-backup circuits used in power mangement.

> ### C.1 Power Supplies

> The RCM2100 requires a regulated 5 V ± 0.25 V DC power source. The RCM2100 design presumes that the voltage regulator is on the user board, and that the power is made available to the RCM2100 board through headers J1 and J2.

> An RCM2100 with no loading at the outputs operating at 22.1 MHz typically draws 140 mA. The RCM2100 will consume 13 mA to 15 mA of additional current when the programming cable is used to connect J5 to a PC.

> #### C.1.1 Batteries and External Battery Connections

> The RCM2100 does not have a battery, but there is provision for a customer-supplied battery to back up SRAM and keep the internal Rabbit 2000 real-time clock running.

> Header J2, shown in Figure C-1, allows access to the external battery. This header makes it possible to connect an external 3 V power supply. This allows the SRAM and the internal Rabbit 2000 real-time clock to retain data with the RCM2100 powered down.

> Figure C-1. External Battery Connections
> at Header J2

> A lithium battery with a nominal voltage of 3 V and a minimum capacity of 165 mA·h is recommended. A lithium battery is strongly recommended because of its nearly constant nominal voltage over most of its life.

> The drain on the battery by the RCM2100 is typically 16 µA when no other power is supplied. If a 950 mA·h battery is used, the battery can last more than 6 years:

> The actual life in your application will depend on the current drawn by components not on the RCM2100 and the storage capacity of the battery. Note that the shelf life of a lithium battery is ultimately 10 years.

> The battery-backup circuit serves three purposes:

> - It reduces the battery voltage to the SRAM and to the real-time clock, thereby limiting the current consumed by the real-time clock and lengthening the battery life.
> - It ensures that current can flow only out of the battery to prevent charging the battery.
> - A voltage, VOSC, is supplied to U7, which keeps the 32.768 kHz oscillator working when the voltage begins to drop.

> VRAM and Vcc are nearly equal (<100 mV, typically 10 mV) when power is supplied to the RCM2100.

> Figure C-2 shows the RCM2100 battery-backup circuit.

> Figure C-2. RCM2100 Battery-Backup Circuit

> VRAM is also available on pin 29 of header J2 to facilitate battery backup of the external circuit. Note that the recommended maximum external current draw from VRAM is 100 µA, and new battery-life calculations should be done to take external loading into account.

> #### C.1.2 Power to VRAM Switch

> The VRAM switch, shown in Figure C-3, allows a customer-supplied external battery to provide power when the external power goes off. The switch provides an isolation between Vcc and the battery when Vcc goes low. This prevents the Vcc line from draining the battery.

> Figure C-3. VRAM Switch

> Transistor Q2 is needed to provide a very small voltage drop between Vcc and VRAM (<100 mV, typically 10 mV) so that the processor lines powered by Vcc will not have a significantly different voltage than VRAM.

> When the RCM2100 is not resetting (pin 2 on U3 is high), the /RESET line will be high. This turns on Q3, causing its collector to go low. This turns on Q2, allowing VRAM to nearly equal Vcc.

> When the RCM2100 is resetting, the /RESET line will go low. This turns off Q2 and Q3, providing an isolation between Vcc and VRAM.

> The battery-backup circuit keeps VRAM from dropping below 2 V.

> #### C.1.3 Reset Generator

> The RCM2100 uses a reset generator, U2, to reset the Rabbit 2000 microprocessor when the voltage drops below the voltage necessary for reliable operation. The reset occurs between 4.50 V and 4.75 V, typically 4.63 V. The RCM2100 has a reset output, pin 33 on header J2. The reset generator has a reset input, pin 34 on header J2, that can be used to force the RCM2100 to reset.

> ### C.2 Chip Select Circuit

> The RCM2100 has provision for battery backup, which kicks in to keep VRAM from dropping below 2 V.

> The current drain on the battery in a battery-backed circuit must be kept to a minimum. When the RCM2100 is not powered, the battery keeps the SRAM memory contents and the real-time clock (RTC) going. The SRAM has a powerdown mode that greatly reduces power consumption. This powerdown mode is activated by raising the chip select (CS) signal line. Normally the SRAM requires Vcc to operate. However, only 2 V is required for data retention in powerdown mode. Thus, when power is removed from the circuit, the battery voltage needs to be provided to both the SRAM power pin and to the CS signal line. The CS control circuit accomplishes this task for the CS signal line.

> Figure C-4 shows a schematic of the chip select circuit.

> Figure C-4. Chip Select Circuit

> In a powered-up condition, the CS control circuit must allow the processor's chip select signal /CS1 to control the SRAM's CS signal /CSRAM. So, with power applied, /CSRAM must be the same signal as /CS1, and with power removed, /CSRAM must be held high (but only needs to be as high as the battery voltage). Q4 and Q5 are MOSFET transistors with opposing polarity. They are both turned on when power is applied to the circuit. They allow the CS signal to pass from the processor to the SRAM so that the processor can periodically access the SRAM. When power is removed from the circuit, the transistors will turn off and isolate /CSRAM from the processor. The isolated /CSRAM line has a 100 kW pullup resistor to VRAM (R16). This pullup resistor keeps /CSRAM at the VRAM voltage level (which under no power condition is the backup battery's regulated voltage at a little more than 2 V).

> Transistors Q4 and Q5 are of opposite polarity so that a rail-to-rail voltages can be passed. When the /CS1 voltage is low, Q4 will conduct. When the /CS1 voltage is high, Q5 will conduct. It takes time for the transistors to turn on, creating a propagation delay. This delay is typically very small, about 10 ns to 15 ns.

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