TCP/IP Development Kit Getting Started

> ## Appendix A. TCP/IP Development Board Specifications

> ### A.1 Electrical and Mechanical Specifications

> Figure A-1 shows the mechanical dimensions for the TCP/IP Development Board.

> Figure A-1. TCP/IP Development Board Dimensions

> Table A-1 lists the electrical, mechanical, and environmental specifications for the TCP/IP Development Board.

> Table A-1. TCP/IP Development Board Specifications
> Parameter | Specification
> Board Size (with optional backup battery board) | 4.30" × 4.71" × 0.79" (109 mm × 120 mm × 20 mm)
> Connectors | 15 screw terminals, 1 RJ-12, and 1 RJ-45
> Operating Temperature | -20°C to +70°C
> Humidity | 5% to 95%, noncondensing
> Input Voltage | 9 V to 40 V DC
> Current | 100 mA @ 12 VDC
> Ethernet Interface | Direct connection to 10BaseT Ethernet networks via RJ-45 connection
> Digital Inputs | 4 protected, 0 V to 5 V DC (protection from -36 V to + 36 VDC max.)
> Digital Outputs | 4 open collector, sinking (200 mA, 40 V DC max.)
> Microprocessor | Rabbit 2000TM
> Clock | 18.432 MHz
> SRAM | 128K, surface mount (supports 32K-512K)
> Flash EPROM | 256K for program and data plus 256K for file storage (supports 128K-512K)
> Timers | 7 eight-bit timers available
> Serial Ports | 1 RS-232 (3-wire), 1 RS-485, and 1 RS-232 programming port RS-232 (3-wire) and RS-485 may be reconfigured for 1 RS-232 (5-wire) or 2 RS-232 (3-wire)
> Serial Rate | Maximum asynchronous 115,200 bps for both serial ports
> Watchdog/Supervisor | Yes
> Time/Date Clock | Yes
> Backup Battery | On backup battery board (not included)

> ### A.2 Jumper Configurations

> Figure A-2 shows the header locations used to configure the various TCP/IP Development Board options via jumpers.

> Figure A-2. Location of TCP/IP Development Board Configurable Positions

> Table A-2 lists the configuration options.

> Table A-2. TCP/IP Development Board Jumper Configurations
> Header | Description | Pins Connected | Factory Default
> JP1 | SRAM Size | 1-2 | 128K | ×
> 2-3 | 512K |
> None | 32K |
> JP2 | Flash 1 Memory Size (U5) | 1-2 | 128K/256K | ×
> 2-3 | 512K |
> JP3 | Flash 2 Memory Size (U6) | 1-2 | 128K/256K | ×
> 2-3 | 512K |
> JP4 | Digital Input Pull-Up/Pull-Down Resistors | 1-2 | Pulled up | ×
> 2-3 | Pulled down |
> JP5 | Flash Memory Bank Select | 1-2 | Normal Mode | ×
> 2-3 | Bank Mode |
> JP6 | RS-485 Bias and Termination Resistors | 1-2 5-6 | Bias and termination resistors connected | ×
> None | Bias and termination resistors not connected |
> JP7 | RS-232/RS-485 Select | 1-3 2-4 | RS-232 TxB/RxB (also TxC/RxC or RTS/CTS) signals on J7 |
> 3-5 4-6 | RS-232 TxC/RxC and RS-485 signals on J7 | ×
> 1-5 2-6 | RS-232 TxB/RxB signals on J5 (U10 must be removed) |

> NOTE | Only headers JP6 and JP7 use actual jumpers. The other connections are made using 0 W surface-mounted resistors.

> ### A.3 Conformal Coating

> The areas around the crystal oscillator and the battery-backup circuit on the TCP/IP Development Board have had the Dow Corning silicone-based 1-2620 conformal coating applied. The conformally coated areas are shown in Figure A-3. The conformal coating protects these high-impedance circuits from the effects of moisture and contaiminants over time.

> Figure A-3. TCP/IP Development Board Areas Receiving Conformal Coating

> Any components in the conformally coated area may be replaced using standard soldering procedures for surface-mounted components. A new conformal coating should then be applied to offer continuing protection against the effects of moisture and contaminants.

> NOTE | For more information on conformal coatings, refer to Technical Note 303, Conformal Coatings.

Rabbit Semiconductor http://www.rabbitsemiconductor.com Voice: (530) 757-8400 FAX: (530) 757-8402 sales@rabbitsemiconductor.com