| # TN302 #

> # Rabbit 2000 Instruction Bug

> An instruction bug was recently discovered in the Rabbit 2000 microprocessor. Rabbit 2000 users are unlikely to encounter this problem because the sequence of instructions that exhibit the bug are never generated by the Dynamic C compiler or in any of the standard libraries. The bug is manifested only if an I/O instruction (prefix `IOI` or `IOE`) is followed by one of 12 single-byte opcode instructions that use HL as an index register. These 12 instructions are:

> ADC A,(HL) | SUB (HL)
> ADD A, (HL) | XOR (HL)
> AND (HL) | DEC (HL)
> CP (HL) | INC (HL)
> OR (HL) | LD r,(HL)
> SBC A,(HL) | LD (HL),r

> where r, an 8-byte register, is one of `A`, `B`, `C`, `D`, `E`, `H`, or `L`. The only combination that is likely to occur in user assembly language programs is an I/O instruction followed by `LD (HL),r`.

> The nature of the failure is that the memory address translation does not take place and so the appropriate memory chip select will not be enabled for the second instruction. In the case of external I/O operations where the I/O strobes on Port E may be enabled, an I/O "chip select" (I/O strobe) will take place instead of a memory chip select. If one of the above instructions follows an internal I/O operation and the memory access takes place in the base region where address translation does not take place, the memory operation will take place properly because the appropriate memory chip select is enabled for internal I/O operations.

> The bug may be easily avoided by placing a `NOP` between the I/O instruction and a following instruction from the above list. Beginning with the 6.57 release, the Dynamic C compiler and assembler will correct for this anomaly by inserting `NOP`s where necessary in generated code. Rabbit Semiconductor does not expect this bug to be encountered by most users.

022-0052 Rev. B
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