> ## 3. Document Conventions

> ### Instruction Table Key

> - `Opcode`: A hexidecimal representation of the value that the mnemonic instruction represents.
> - `Instruction`: The mnemonic syntax of the instruction.
> - `Clocks`: The number of clock cycles it takes to complete this instruction. The numbers in parenthesis are a breakdown of the total clocks. The number of clocks instructions take follows a general patern. There are several Rabbit instructions that do not adhere to this pattern. Some instructions take more clocks and some have been enhanced to take fewer clocks.

> Table 1: Clocks Breakdown

> Process | Clocks
> Each byte of the opcode. | 2
> Each data byte read. | 2
> Write to memory or exteral IO. | 3
> Write to internal IO. | 2
> Internal operation or computation. | 1

> - `Operation`: A symbolic representation of the operation performed.

> ### ALTD, I/O and Flags Table Keys

> Table 2: ALTD ("A" Column) Symbol Key

> Flag | Description
> F | R | SP
> · |  |  | ALTD selects alternate flags
> | · |  | ALTD selects alternate destination register
> |  | · | ALTD operation is a special case

> Table 3: IOI and IOE ("I" Column) Symbol Key

> Flag | Description
> S | D
> | · | IOI and IOE affect destination
> · |  | IOI and IOE affect source

> Table 4: Flag Register Key

> S | Z | L/V | C | Description
> · |  |  |  | Sign flag affected
> - |  |  |  | Sign flag not affected
> | · |  |  | Zero flag affected
> | - |  |  | Zero flag not affected
> |  | L |  | LV flag contains logical check result
> |  | V |  | LV flag set on arithmetic overflow result
> |  | 0 |  | LV flag is cleared
> |  | · |  | LV flag is affected
> |  |  | · | Carry flag is affected
> |  |  | - | Carry flag is not affected
> |  |  | 0 | Carry flag is cleared
> |  |  | 1 | Carry flag is set

> ### Document Symbols Key

> Table 5: Symbols

> Rabbit | Z180 | Meaning
> b | b | Bit select (000 = bit 0, 001 = bit 1, 010 = bit 2, 011 = bit 3, 100 = bit 4, 101 = bit 5, 110 = bit 6, 111 = bit 7)
> cc | cc | Condition code select (00 = NZ, 01 = Z, 10 = NC, 11 = C)
> d | d | 7-bit (signed) displacement. Expressed in two's complement.
> dd | ww | word register select-destination (00 = BC, 01 = DE, 10 = HL, 11 = SP)
> dd' |  | word register select-alternate(00 = BC', 01 = DE', 10 = HL')
> e | j | 8-bit (signed) displacement added to PC
> f | f | condition code select (000 = NZ, 001 = Z, 010 = NC, 011 = C, 100 = LZ/NV, 101 = LO/V, 110 = P, 111 = M)
> m | m | the most significant bits(MSB) of a 16-bit constant
> mn | mn | 16-bit constant
> n | n | 8-bit constant or the least significant bits(LSB) of a 16-bit constant
> r, g | g, g' | byte register select (000 = B, 001 = C, 010 = D, 011 = E, 100 = H, 101 = L, 111 = A)
> ss | ww | word register select-source ( 00 = BC, 01 = DE, 10 = HL, 11 = SP)
> v | v | Restart address select ( 010 = 0020h, 011 = 0030h, 100 = 0040h, 101 = 0050h, 111 = 0070h)
> x | nbr | an 8-bit constant to load into the XPC
> xx | xx | word register select ( 00 = BC, 01 = DE, 10 = IX, 11 = SP)
> yy | yy | word register select (00 = BC, 01 = DE, 10 = IY, 11 = SP)
> zz | zz | word register select (00 = BC, 01 = DE, 10 = HL, 11 = AF)

> ### Condition Codes

> Table 6: Condition Code Description

> Condition | Flag=Value | Description
> NZ | Z=0 | Not Zer0
> Z | Z=1 | Zero
> NC | C=0 | No Carry (C=0)
> C | C=1 | Carry (C=1)
> P | S=0 | Minus
> M | S=1 | Positive
> LZ | L/V=0 | For logic operations, Logic Zero (all of the four most significant bits of the result are zero)
> NV | L/V=0 | For arithmentic operations, No Overflow
> LO | L/V=1 | For logic operations, Logic One (one or more of the four most significant bits of the result are one)
> V | L/V=1 | For arithmentic operations, Overflow

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