Jackrabbit (BL1800 Series) User's Manual

> ## 3. Subsystems

> Chapter 3 describes the principal subsystems and their use for the Jackrabbit.

> - Switching Between Program Mode and Run Mode
> - Digital Inputs/Outputs
> - A/D Converter
> - D/A Converters
> - High-Power Outputs
> - Serial Communication
> - Memory

> ### 3.1 Switching Between Program Mode and Run Mode

> The Jackrabbit is automatically in Program Mode when the programming cable is attached, and is automatically in Run Mode when no programming cable is attached. See Figure 4.

> Figure 4. Jackrabbit Program Mode and Run Mode Setup

> #### 3.1.1 Detailed Instructions: Changing from Program Mode to Run Mode

> Figure 5. Location of Prototyping Board Reset Button |

> 1. Disconnect the programming cable from header J3 of the Jackrabbit board.
> 2. Reset the Jackrabbit board. You may do this as explained in Figure 4. Figure 5 shows the location of the RESET button on the Prototyping Board.

> The Jackrabbit is now ready to operate in the Run Mode.

> #### 3.1.2 Detailed Instructions: Changing from Run Mode to Program Mode

> 1. Attach the programming cable to header J3 on the Jackrabbit board.
> 2. Reset the Jackrabbit board. You may do this as explained in Figure 4. Figure 5 shows the location of the RESET button on the Prototyping Board.

> The Jackrabbit is now ready to operate in the Program Mode.

> ### 3.2 Jackrabbit Inputs and Outputs

> Figure 6 shows the Jackrabbit digital inputs/outputs, high-power outputs, serial ports, analog-to-digital converter, and digital-to-analog converters.

> Figure 6. Jackrabbit Subsystems

> Figure 7 shows the pinout for headers J4 and J5, which carry the signals associated with the Jackrabbit subsystems.

> Figure 7. Pinout for Jackrabbit Headers J4 and J5

> The ports on the Rabbit 2000 microprocessor used in the Jackrabbit are configurable, and so the factory defaults can be reconfigured. Table 2 lists the Rabbit 2000 factory defaults and the alternate configurations.

> Table 2. Jackrabbit Pinout Configrations
> Pin | Rabbit 2000 Factory Default | Alternate Use | Jackrabbit Use
> PA0-PA7 | Parallel I/O | Slave port data bus SD0-SD7 |
> PB0 | Parallel I/O | Serial port clock CLKB | PB1 (CLKA) is connected to J3 (programming port)
> PB1 | Serial port clock CLKA
> PB2 | Input | Slave port write /SWR
> PB3 | Input | Slave port read /SRD
> PB4 | Input | Slave port address lines SA1-SA0
> PB5 | Input
> PB6 | Output |
> PB7 | Output | Slave port attention line /SLAVEATTN
> PC0 | Output | TXD | Connected to RS-485 IC Tx input
> PC1 | Input | RXD | Connected to RS-485 IC Rx output
> PC2 | Output | TXC | Connected to RS-232 IC Tx input
> PC3 | Input | RXC | Connected to RS-232 IC Rx output
> PC4 | Output | TXB | Connected to RS-232 IC Tx input
> PC5 | Input | RXB | Connected to RS-232 IC Rx output
> PC6 | Output | TXA | Connected to programming port
> PC7 | Input | RXA
> PD0 | Bitwise or parallel programmable I/O, can be driven or open-drain output |  |
> PD1 |  | Connected to control DA0
> PD2 |  | Connected to control DA0
> PD3 |  |
> PD4 | ATXB output | Connected to control DA1
> PD5 | ARXB input | Connected to RS-485 IC data enable input
> PD6 | ATXA output |
> PD7 | ARXA input |
> PE0 | Bitwise or parallel programmable I/O | I0 output or INT0A input | HV0 output control
> PE1 | I1 output or INT1A input | HV1 output control
> PE2 | I2 output | HV2 output control
> PE3 | I3 output | HV3 output control
> PE4 | I4 output or external INT0B input |
> PE5 | I5 output or external INT1B input |
> PE6 | I6 output | Connected to A/D comparator output
> PE7 | I7 output or slave port chip select /SCS | Connected to A/D comparator output
> PCLK | Peripheral clock | Output |
> IOBEN | I/O buffer enable | Output |
> WDO | Watchdog output | Single low pulse output |
> STAT | Status | Output | Connected to programming port

> ### 3.3 Digital Inputs/Outputs

> The Jackrabbit has 24 general-purpose digital inputs/outputs available on headers J4 and J5--16 are bidirectional, four are inputs only, and 4 are outputs only, as shown in Figure 6.

> The 16 bidirectional inputs are located on pins PA0-PA7, PB0-PB1, PD0, PD3, PD6, PD7, PE4, and PE5. The locations of these pins are shown in Figure 8.

> Figure 8. Jackrabbit I/O Pins

> As shown in Table 2, pins PE4 and PE5 can instead be used as external INT0B and INT1B interrupts. Pins PD6 and PD7 can instead be used to access Serial Port A on The Rabbit 2000 microprocessor. Pins PB0 and PB1 can instead be used to access the clock on Serial Port B and Serial Port A of the Rabbit 2000 microprocessor.

> #### 3.3.1 Inputs

> The four input-only are located on PB2-PB5. These pins can instead be used with the slave port of the Rabbit 2000 microprocessor.

> #### 3.3.2 Outputs

> The four output-only pins are located on PB6-PB7, PCLK, and IOBEN. PB7 can also be used with the slave port of the Rabbit 2000 microprocessor. The primary function of PCLK is as a peripheral clock or a peripheral clock ÷ 2, but PCLK can instead be used as a digital output. Similarly, IOBENB is an I/O buffer enable, but can instead be used as a digital output. STAT and WDO also have limited uses as digital outputs.

> ### 3.4 A/D Converter

> The analog-to-digital (A/D) converter, shown in Figure 9, compares the DA0 voltage to AD0, the voltage presented to the converter. DA0 therefore cannot be used for the digital-to-analog (D/A) converter when the A/D converter is being used.

> Figure 9. Schematic Diagram of A/D Converter

> The A/D converter transforms the voltage at DA0 into a 20 mV window centered around DA0. For example, if DA0 is 2.0 V, the window in the A/D converter would be 1.990 V to 2.010 V. If AD0 > 2.010 V, PE7 would read high and PE6 would read low. If 1.990 V < AD0 < 2.010 V, PE7 would read low and PE6 would read low. This is the case when the A/D input is exactly the same as DA0. If AD0 < 1.990 V, PE7 would read low and PE6 would read high.

> PE6 can be imagined to be a "DA0 voltage is too high" indicator. If DA0 is larger than the analog voltage presented at AD0, then PE6 will be true (high). If this happens, the program will need to reduce the DA0 voltage.

> PE7 can be imagined to be a "DA0 voltage is too low" indicator. If DA0 is smaller than the analog voltage presented at AD0, then PE7 will be true (high). If this happens, the program will need to raise the DA0 voltage.

> The A/D input, AD0, is the same as DA0 only when PE6 and PE7 are low. Because the A/D converter circuit uses a 20 mV window, the accuracy is ±10 mV. DA0 can range from 0.1 V to 2.8 V, which represents 270 steps of ±10 mV. This is better than 8-bit accuracy. Since the D/A converter is able to change the DA0 output in 3.88 mV steps, there are 697 steps over the range from 0.1 V to 2.8 V. This represents a resolution of more than 9 bits.

> There is a 10 kW resistor, R31, connected between Vcc and AD0. This resistor should provide an appropriate voltage divider bias for a variety of common thermistors so that they can be connected directly between AD0 and ground. The A/D converter load is the 10 kW resistor connected to Vcc. Remove R31 if a smaller load is desired--this will lead to a very high input impedance for the A/D converter.

> The A/D converter has no reference voltage. There is a relative accuracy between measurements, but no absolute accuracy. This is because Vcc can vary ±5%, the pulse-width modulated outputs might not reach the full 0 V and 5 V rails out of the Rabbit 2000 microprocessor, and the gain resistors used in the circuit have a 1% tolerance. For these reasons, each Jackrabbit needs to be calibrated individually, with the constants held in software, to be able to rely on an absolute accuracy. The Jackrabbit is sold without this calibration support.

> The algorithm provided to perform the conversion does a successive approximation search for the analog voltage. This takes an average of 150 ms, and a maximum of 165 ms, with a 14.7 MHz Jackrabbit.

> ### 3.5 D/A Converters

> Two digital-to-analog (D/A) converter outputs, DA0 and DA1, are supplied on the Jackrabbit. These are shown in Figure 10.

> The D/A converters have no reference voltage. Although they may be fairly accurate from one programmed voltage to the next, they do not have absolute accuracy. This is because Vcc can change ±5%, the PWM outputs might not achieve the full 0 V and 5 V rail out of the processor, and the gain resistors in the circuit have a 1% tolerance. The D/A converters therefore need individual calibration, with the calibration constants held in software before absolute accuracy can be relied on. The Jackrabbit is sold without such calibration.

> Figure 10. Schematic Diagram of D/A Converters

> Note that DA0 is used to provide a reference voltage for the A/D converter and is unavailable for D/A conversion when the A/D converter is being used.

> Pulse-width modulation (PWM) is used for the D/A conversion. This means that the digital signal, which is either 0 V or 5 V, is a train of pulses. This means that if the signal is taken to be usually at 0 V (or ground), there will be 5 V pulses. The voltage will be 0 V for a given time, then jump to 5 V for a given time, then back to ground for a given time, then back to 5 V, and so on. A hardware filter in the circuit consisting of a resistor and capacitor averages the 5 V signal and the 0 V signal over time. Therefore, if the time that the signal is at 5 V is equal to the time the signal is 0 V, the duty cycle will be 50%, and the average signal will be 2.5 V. If the time at 5 V is only 25% of the time, then the average voltage will be 1.25 V. Thus, the software needs to only vary the time the signal is at 5 V with respect to the time the signal is at 0 V to achieve any desired voltage between 0 V and 5 V. It is very easy to do pulse-width modulation with the Rabbit 2000 microprocessor because of the chip's architecture.

> #### 3.5.1 DA1

> The op amp supporting DA1 converts pulse-width modulated signals to an analog voltage between 0 V and 5 V. A digital signal that varies with time is fed from PD4. The resolution of the DA1 output depends on the smallest increment of time to change the on/off time (the time between 5 V and 0 V). The Jackrabbit uses the Rabbit 2000's Port D control registers to clock out the signal at a timer timeout. The timer used is timer B. Timer B has 10 bits of resolution so that the voltage can be varied in 1/1024 increments. The resolution is thus about 5 mV (5 V/1024).

> R28 is present solely to balance the op amp input current bias. R25 helps to achieve a voltage close to ground for a 0% duty cycle.

> A design constraint dictates how fast timer B must run. The hardware filter has a resistor-capacitor filter that averages the 0 V and 5 V values. Its effect is to smooth out the digital pulse train. It cannot be perfect, and so there will be some ripple in the output voltage. The maximum signal decay between pulses will occur when DA1 is set to 2.5 V. This means the pulse train will have a 50% duty cycle. The maximum signal decay will be

> where RC = 0.01 s for 14.7 MHz Jackrabbits, and t is the pulse on or off time (not the length of the total cycle).

> Timer B is driven at the Rabbit 2000 frequency divided by 2. The frequency achievable with a 14.7 MHz clock is (14.7 MHz/2)/1024 = 7.17 kHz. This is a period of 1/f = 139 µs. For a 50% duty cycle, half of the period will be high (70 µs at 5 V), and half will be low (70 µs at 0 V). Thus, a 14.7 MHz Jackrabbit has t = 70 µs. Based on the standard capacitor discharge formula, this means that the maximum voltage change will be

> This is less than a 20 mV peak-to-peak ripple.

> The DA1 output can be less than 100 mV for a 0% duty cycle and above 3.5 V for a 100% duty cycle. Because of software limitations on the low side and hardware limitations on the high side, the duty cycle can only be programmed from 12% to 72%. The low limitation allows the software to perform other tasks as well as maintain the PWM for the D/A converters. The high limitation is simply the maximum voltage obtainable with the LM324 op amp used in the circuit. Anything outside the 12%-72% range gets output as either a 0% or a 100% duty cycle. The duty cycle is programmed as the high-time count of 1024 total counts of the Rabbit 2000's timer B. Thus, 256 counts would be 25% of 1024 counts, and corresponds to a 25% duty cycle.

> Table 3 lists typical DA1 voltages measured for various duty cycle values with a load larger than 1 MW.

> Table 3. Typical DA1 Voltages for Various Duty Cycles
> Duty Cycle (%) | Voltage (V) | Programmed Count
> 0 | 0.002 | 0-122
> 12 | 0.620 | 123
> 25 | 1.242 | 256
> 50 | 2.483 | 512
> 72 | 3.567 | 742
> 100 | 3.567 | 743-1024

> It is important to remember that the DA1 output voltage will not be realized instantaneously after programming in a value. There is a settling time because of the RC time constant (R24 × C22), which is 10 ms. For example, the voltage at any given time is

> V = VP - (VP - VDA1)e(-t/RC)

> where V is the voltage at time t, VP is the programmed voltage, VDA1 is the last DA1 output voltage from the D/A converter, and RC is the time constant (10 ms). The settling will be within 99.326% (or within about 21 mV for a 3 V change in voltage) after five time constants, or 50 ms. Six time constants, 60 ms, will allow settling to within 99.75% (or to within about 8 mV for a 3 V change in voltage). Seven time constants, 70 ms, will allow settling to within 99.91% (or to within about 3 mV for a 3 V change in voltage).

> An LM324 op amp, which can comfortably source 10 mA throughout the D/A converter range, drives the D/A converter output. If the output voltage is above 1 V, the D/A converter can comfortably sink 10 mA. Below 1 V, the D/A converter can only sink a maximum of 100 µA.

> To summarize, DA1 is provided uncalibrated, can be programmed with a resolution of 5 mV and a peak-to-peak ripple less than 20 mV over the range from 0.7 V to 3.5 V and 0 V. The settling time to within 21 mV is 50 ms.

> #### 3.5.2 DA0

> The op amp supporting DA0 translates a 12%-88% duty cycle to an analog voltage range of 0 V to 3 V. The software operates only within this duty cycle; a duty cycle less than 12% is rounded down to 0%, and any duty cycle above 88% is rounded up to 100%.

> DA0 uses a voltage divider that consists of R21 and R27 and a gain-offset circuit that consists of R26 and R29 to achieve the output range of 0 V to 3 V within the software duty cycle.

> The DA0 output can be less than 100 mV for a 0% duty cycle and above 3.0 V for a 100% duty cycle. The duty cycle is programmed as the high-time count of 1024 total counts of the Rabbit 2000's timer B. Thus, 256 counts would be 25% of 1024 counts, and corresponds to a 25% duty cycle.

> Table 4 lists typical DA0 voltages measured for various duty cycle values with a load larger than 1 MW.

> Table 4. Typical DA0 Voltages for Various Duty Cycles
> Duty Cycle (%) | Voltage (V) | Programmed Count
> 0 | 0.074 | 0-122
> 12 | 0.076 | 123
> 25 | 0.530 | 256
> 50 | 1.467 | 512
> 75 | 2.406 | 768
> 88 | 2.875 | 901
> 100 | 3.345 | 902-1024

> It is important to remember that the DA0 output voltage will not be realized instantaneously after programming in a value. There is a settling time because of the RC time constant (R21 || R27 × C20), which is 7.68 ms. For example, the voltage at any given time is

> V = VP - (VP - VDA0)e(-t/RC)

> where V is the voltage at time t, VP is the programmed voltage, VDA0 is the last DA0 output voltage from the D/A converter, and RC is the time constant (7.68 ms). The settling will be within 99.326% (or within about 21 mV for a 3 V change in voltage) after five time constants, or 38 ms. Six time constants, 46 ms, will allow settling to within 99.75% (or to within about 8 mV for a 3 V change in voltage). Seven time constants, 54 ms, will allow settling to within 99.91% (or to within about 3 mV for a 3 V change in voltage).

> The settling time is reduced somewhat by precharging capacitor C20 with pulse-width modulation from PD2.

> The resolution of the DA0 output depends on the smallest increment of time to change the on/off time (the time between 5 V and 0 V). The Jackrabbit uses the Rabbit 2000's Port D control registers to clock out the signal at a timer timeout. The timer used is timer B. Timer B has 10 bits of resolution so that the voltage can be varied in 1/1024 increments. The resolution is thus about 3.88 mV for the DA0 output voltage range of 0 V to 3 V in the 12%-88% duty cycle.

> An LM324 op amp, which can comfortably source 10 mA throughout the D/A converter range, drives the D/A converter output. If the output voltage is above 1 V, the D/A converter can comfortably sink 10 mA. Below 1 V, the D/A converter can only sink a maximum of 100 µA.

> The peak-to-peak ripple on DA0 is less than 3 mV. There is a way to get rid of the ripple for very small periods of time. To do that, simply program the PWM port from a PWM output to a high-impedance input. This will allow the capacitor to hold the voltage subject only to leakage currents, which add up to about 1 µA. This will cause the capacitor to change voltage at the rate of 10 V per second, or 10 mV per millisecond. Practically, this means that the PWM can stop for about 1 ms (seven 1024-count D/A converter cycles on a 14.7 MHz processor clock) with a voltage movement of less than 10 mV.

> To summarize, DA0 is provided uncalibrated, can be programmed with a resolution of 3.88 mV and a peak-to-peak ripple less than 3 mV over the range from 0.1 V to 2.8 V and at 3.35 V. The settling time to within 3 mV is 54 ms.

> ### 3.6 High-Power Outputs

> The Jackrabbit board has four high-power outputs, HV0-HV3, connected to the Rabbit 2000 pins E0-E3 (Port E). Three high-power outputs, HV0-HV2, are always sinking; HV3 is factory-configured to be a sourcing output, but can be reconfigured to provide a fourth sinking output.

> #### 3.6.1 High-Power Sinking Outputs (HV0-HV2)

> Three high-power outputs, HV0-HV2, are always sinking. The sinking configuration is shown schematically in Figure 11.

> Figure 11. High-Power Sinking Outputs

> The transistor simply shorts the high-voltage output to ground when the respective PE0-PE2 signal goes high. The current-sinking capability is limited only by the current gain of the transistor. The Rabbit 2000 will source about 8 mA per channel and, given a conservative transistor current gain of 25, this allows a normal 4401 NPN transistor, which is installed on the BL1810 and BL1820, to sink up to 200 mA. A high-performance transistor such as the Zetex FMMT619, which is installed on the BL1800, can sink up to 1 A. The collectors of these transistors are protected against inductive loads by a diode-capacitor combination.

> K is limited to a maximum of 30 V by the power dissipation of resistors R51 and R52 in the sourcing output since a common K is used for all four high-power outputs.

> #### 3.6.2 Configurable High-Power Output (HV3)

> HV3, shown schematically in Figure 12, is factory-configured to be a sourcing output.

> Figure 12. Configurable High-Current Output

> When used as a sourcing output, HV3 is shorted to K when PE3 on the Rabbit 2000 goes high, and the two transistors shown in Figure 12 are turned on. The maximum sourcing current is 100 mA (BL1810 and BL1820) or 500 mA (BL1800), and the maximum K is 30 V. This voltage limit on K arises because R51 and R52 at the base of Q28 can each dissipate 500 mW for a total of 1 W. The 30 V limit then constrains the sinking outputs as well because K is common to all four high-current outputs.

> HV3 can also be reconfigured as a sinking output. To do so, remove the 0 W surface-mounted resistor R56, and solder on a 0 W surface-mounted resistor or jumper wire at R55. If you plan to drive inductive loads, add a diode at D21. Figure 13 shows the location of these components.

> Figure 13. Changing HV3 to a Sinking Output

> #### 3.6.3 Connecting a Load to the High-Power Outputs

> The common power supply for the four high-power outputs is called K, and is available on header J4. Connect K to the power supply that powers the load, which is usually a separate power supply to that used for the Jackrabbit, and must be no more than 30 V because of the power limitations of the resistors used in the sourcing output circuit.

> The K connection performs two functions.

> 1. K supplies power to the sinking/sourcing transistors used in the high-current output circuits.
> 2. A diode-capacitor combination in the circuit "snubs" voltage transients when inductive loads such as relays and solenoids are driven.

> Note that the same K supply is used for all four high-power outputs. Figure 14 shows the connection of a load to the sinking and sourcing outputs. The load's supply has a common ground with the rest of the Jackrabbit.

> Figure 14. Connecting Loads to Sinking and Sourcing Outputs

> ### 3.7 Serial Communication

> The Jackrabbit has two RS-232 (3-wire) serial channels, one RS-485 serial channel, and one synchronous CMOS serial channel.

> #### 3.7.1 RS-232

> The Jackrabbit's two RS-232 serial channels are connected to an RS-232 transceiver, U4, an industry-standard MAX232 chip. U4 provides the voltage output, slew rate, and input voltage immunity required to meet the RS-232 serial communication protocol. Basically, the chip translates the Rabbit 2000's 0 V to +Vcc signals to ±10 V. Note that the polarity is reversed in an RS-232 circuit so that +5 V is output as -10 V and 0 V is output as +10 V. U4 also provides the proper line loading for reliable communication.

> The Rabbit 2000 serial port B signals are presented as RS-232 compliant signals TXB (serial port B transmit) and RXB (serial port B receive) on header J5.

> The Rabbit 2000 serial port C signals are presented as RS-232 compliant signals TXC (serial port C transmit) and RXC (serial port C receive) on header J5.

> The maximum baud rate for each RS-232 serial channel is 115,200 bps. RS-232 can be used effectively at this baud rate for distances up to 15 m.

> Because two RS-232 transmit and two RS-232 receive lines are available, one serial channel can be used for serial transmit and receive, and the other serial channel can be used as a general digital I/O for RTS/CTS handshaking. Although the present release of Dynamic C does not support RTS/CTS handshaking in its libraries, it is possible to write your own software.

> #### 3.7.2 RS-485

> The Jackrabbit has one RS-485 serial channel, which is connected to the Rabbit 2000 serial port D through U6, an RS-485 transceiver. U6 supports the RS-485 serial communication protocol. The chip's slew rate limiters provide for a maximum baud rate of 250,000 bps. The half-duplex communication uses the Rabbit 2000's PD5 pin to control the data enable on the communication line.

> The Jackrabbit can be used in an RS-485 multidrop network. Connect the RS-485+ to RS-485+ and RS-485- to RS-485- using single twisted-pair wires (nonstranded, tinned) as shown in Figure 15.

> Figure 15. Multidrop Jackrabbit Network

> The Jackrabbit comes with a 220 W termination resistor and 681 W bias resistors already installed, as shown in Figure 16.

> Figure 16. RS-485 Termination and Bias Resistors

> The load these bias and termination resistors present to the RS-485 transceiver (U6) limits the number of Jackrabbits in a multidrop network to one master and nine slaves, unless the bias and termination resistors are removed. When using more than 10 Jackrabbits in a multidrop network, leave the 681 W bias resistors in place on the master Jackrabbit, and leave the 220 W termination resistors in place on the Jackrabbit at each end of the network.

> #### 3.7.3 Programming Port

> The Jackrabbit has a 10-pin program header labeled J3. The programming port uses the Rabbit 2000's serial port A for communication. The Rabbit 2000 startup-mode pins (SMODE0, SMODE1) are presented to the programming port so that an externally connected device can force the Jackrabbit to start up in an external bootstrap mode.

> The programming port is used to start the Jackrabbit in a mode where the Jackrabbit will download a program from the port and then execute the program. The programming port transmits information to and from a PC while a program is being debugged.

> The Jackrabbit can be reset from the programming port.

> The Rabbit 2000 status pin is also presented to the programming port. The status pin is an output that can be used to send a general digital signal.

> The clock line for serial port A is presented to the programming port, which makes fast serial communication possible.

> ### 3.8 Memory

> #### 3.8.1 SRAM

> The Jackrabbit is designed to accept 32K to 512K of SRAM packaged in an SOIC case.

> The existing standard models of the Jackrabbit Series come with 128K of SRAM. A factory-installed option for 512K of SRAM is available. Figure 17 shows the locations and the jumper settings for the jumpers at JP1 used to set the SRAM size. The "jumpers" are 0 W surface-mounted resistors.

> Figure 17. Jackrabbit Jumper Settings for SRAM Size

> NOTE | For ordering or other information involving the factory-intsalled 512K SRAM option, call your Z-World Sales Representative at (530)757-3737.

> No 0 W surface-mounted resistors are installed at JP1 for 32K SRAM.

> #### 3.8.2 Flash EPROM

> The Jackrabbit is also designed to accept 128K to 512K of small-sector-size flash EPROM packaged in a TSOP case. Z-World recommends that Jackrabbit applications should not be constrained by the sector size of the flash EPROM since it may be necessary to use large-sector-size flash EPROM in the future.

Z-World http://www.zworld.com Voice: (530) 757-3737 FAX: (530) 753-5141 sales@zworld.com