Smart Star User's Manual

> ## 3. Hardware Features

> Chapter 3 describes the principal features for the Smart Star backplanes and CPU cards.

> · Power Distribution
> - Power Distribution
> - I/O Card Slots

> · Smart Star CPU Card Features
> - Serial Communication
> - Memory
> - Other Connectors

> ### 3.1 Backplane Features

> #### 3.1.1 Power Distribution

> Power is supplied to the Smart Star control system from an external source through header J1 on the backplane. The +5 V circuitry on the Smart Star control system is protected against reverse polarity by a Schottky diode as shown in Figure 6.

> Figure 6. Smart Star Control System Power Supply Schematic

> A capacitor provides surge current protection for the voltage regulator, and allows the external power supply to be located some distance away from the Smart Star control system. A switching power regulator is used. The +RAW input voltage may range from 9 V to 30 V (15 V to 30 V you plan to use a D/A converter card).

> The backplane has inputs for two separate power supplies on header J1, +RAW and V_USER. The +RAW power supply goes to the switching power regulator, which outputs the +5 V DC used by the CPU card and by the I/O cards plugged into the backplane. The V_USER connection allows a different voltage to be available on the I/O cards for future development.

> NOTE | Always connect V_USER to +RAW with a jumper wire between terminals 1 and 2 on header J1 for the development activities described in the Smart Star manuals.

> Figure 7 shows how the power supplies are distributed on the backplane and on the CPU card.

> Figure 7. Smart Star Power Supplies--Backplane and CPU Card

> Figure 8 shows how the power supplies are distributed on the I/O cards.

> Figure 8. Smart Star Power Distribution on I/O Cards

> NOTE | Note that Z-World recommends tying +RAW to +V_USER as explained in Section 2.2, "Connect the Power Supply."

> The user has the option of using a separate power supply to K when configuring the high-power outputs for the digital I/O cards. The connection to K is through the user interface on the digital I/O card. Further details are provided in Chapter 7, "Digital I/O Cards".

> #### 3.1.2 I/O Card Slots

> The backplane serves to make the CPU card accessible to up to seven I/O cards plugged in to SLOT 0 through SLOT 6 on the backplane. Figure 9 shows the pinout for SLOT 0 through SLOT 6 (headers J3-J9) on the backplane.

> Figure 9. Pinout for SLOT 0 Through SLOT 6
> (Headers J3-J9) on the Backplane

> NOTE | The SR9050 backplane can accomodate up to three I/O cards plugged in to SLOT 0 through SLOT 2 (headers J3-J5).

> ### 3.2 Smart Star CPU Card Features

> #### 3.2.1 Serial Communication

> The CPU card has one screw terminal header for RS-232/RS-485 serial communication (J3) and one RJ-45 Ethernet jack (J7, SR9150 only). The RJ-12 jack, J6, is reserved for future use and therefore has no signals. The pinouts are shown in Figure 10.

> Figure 10. Smart Star CPU Card Serial Pinout

> The factory default for the CPU card is one RS-232 (3-wire) and one RS-485 serial channel, corresponding to Mode 0 in Figure 10. The other modes shown in Figure 10 are set in software via the Dynamic C `serMode` function call (see Section 4.4, "Serial Communication APIs").

> ##### 3.2.1.1 RS-232

> The CPU card's RS-232 serial channel is connected to an RS-232 transceiver. The transceiver provides the voltage output, slew rate, and input voltage immunity required to meet the RS-232 serial communication protocol. Basically, the chip translates the Rabbit 2000's 0 V to +Vcc signals to RS-232 signal levels. Note that the polarity is reversed in an RS-232 circuit so that +5 V is output as approximately -10 V and 0 V is output as approximately +10 V. The transceiver also provides the proper line loading for reliable communication.

> The maximum baud rate is 115,200 bps. RS-232 can be used effectively at this baud rate for distances up to 15 m.

> The Rabbit 2000 serial port C TXD and RXD signals are presented either as RS-232 TX and RX or as RTS/CTS handshaking, depending on the mode selected with the Dynamic C function `serMode`. The RS-232 signals are available on screw terminal header J3.

> ##### 3.2.1.2 RS-485

> The CPU card has one RS-485 serial channel, which is connected to the Rabbit 2000 serial port C through an RS-485 transceiver. The chip's slew rate limiters provide for a maximum baud rate of 250,000 bps, and allows networking over a distance of up to 300 m (or 1000 ft.). The half-duplex communication uses the Rabbit 2000's PD4 pin to control the data enable on the communication line.

> The RS-485 signals are available on the CPU card through screw terminal header J3.

> The Smart Star control system can be used in an RS-485 multidrop network. Connect the 485+ to 485+ and 485- to 485- using single twisted-pair wires on the CPU card's header J4 as shown in Figure 11. Note that a common ground is recommended.

> Figure 11. Multidrop Smart Star Network

> The CPU card comes with a 220 W termination resistor and 681 W bias resistors already installed and enabled with jumpers across pins 1-2 and 5-6 on header JP1, as shown in Figure 12.

> Figure 12. RS-485 Termination and Bias Resistors

> For best performance, the bias and termination resistors in a multidrop network should only be enabled on both end nodes of the network. Disable the termination and bias resistors on any intervening Smart Star units in the network by removing both jumpers from header JP1.

> NOTE | Save the jumpers for possible future use by "parking" them across pins 1-3 and 4-6 of header JP1. Pins 3 and 4 are not otherwise connected to the CPU card.

> ##### 3.2.1.3 Programming Port

> The CPU card has a 10-pin programming header labeled J2. The programming port uses the Rabbit 2000's Serial Port A for communication, and is used for the following operations.

> - Programming/debugging

> - Cloning

> - Remote program download/debug over an Ethernet connection via the RabbitLink EG2100

> The programming port is used to start the Smart Star in a mode where the CPU card will download a program from the port and then execute the program. The programming port transmits information to and from a PC while a program is being debugged.

> The Rabbit 2000 startup-mode pins (SMODE0, SMODE1) are presented to the programming port so that an externally connected device can force the Rabbit 2000 to start up in an external bootstrap mode.

> NOTE | Refer to the Rabbit 2000 Microprocessor User's Manual for more information related to the bootstrap mode.

> The programming port can also be used as a diagnostic port when the DIAG connector on the programming cable is used to connect the programming port to a PC or other device. See Appendix D, "Programming Cable," for more information.

> ##### 3.2.1.4 Ethernet Port (SR9150 only)

> Figure 13 shows the pinout for the Ethernet port (J2 on the CPU card). Note that there are two standards for numbering the pins on this connector--the convention used here, and numbering in reverse to that shown. Regardless of the numbering convention followed, the pin positions relative to the spring tab position (located at the bottom of the RJ-45 jack in Figure 13) are always absolute, and the RJ-45 connector will work properly with off-the-shelf Ethernet cables.

> Figure 13. RJ-45 Ethernet Port Pinout

> RJ-45 pinouts are sometimes numbered opposite to the way shown in Figure 13.

> Two LEDs are placed behind the RJ-45 Ethernet jack, one to indicate an Ethernet link (LNK) and one to indicate Ethernet activity (ACT). Only the CPU LEDs are functional at this time since the RCM LEDs were added for future enhancements to the CPU card.

> The transformer/connector assembly ground is connected to the CPU card digital ground via a 0 W resistor "jumper," R43, as shown in Figure 14.

> Figure 14. Isolation Resistor R43

> The factory default is for the 0 W resistor "jumper" at R43 to be installed. In high-noise environments, remove R43 and ground the transformer/connector assembly directly through the chassis ground. This will be especially helpful to minimize ESD and/or EMI problems.

> #### 3.2.2 Memory

> ##### 3.2.2.1 SRAM

> The Smart Star CPU cards are designed to accept 128K or 512K of static RAM packaged in an SOIC case. Standard CPU cards come with 128K of SRAM.

> ##### 3.2.2.2 Flash EPROM

> The Smart Star CPU card are also designed to accept 128K to a total of 512K of flash memory packaged in a TSOP case. The CPU cards come with two 256K flash memory chips.

> NOTE | Z-World recommends that any customer applications should not be constrained by the sector size of the flash memory since it may be necessary to change the sector size in the future.

> A Flash Memory Bank Select jumper configuration option based on 0 W surface-mounted resistors exists at header JP5 on the CPU card. This option, used in conjunction with some configuration macros, allows Dynamic C to compile two different co-resident programs for the upper and lower halves of the 256K flash in such a way that both programs start at logical address 0000. This is useful for applications that require a resident download manager and a separate downloaded program. See Technical Note 218, Implementing a Serial Download Manager for a 256K Flash, for details.

> #### 3.2.3 Other Connectors

> The connectors labeled J4 and J5 in Figure 15 are reserved for future use and should not be used in customer applications at this time.

> Figure 15. CPU Card Connectors J4 and J5

> Jumpers across pins 9-10 and 13-14 on header JP1 on the backplane are used to bring out the ACT and LNK LED signals to header J6, which is used to connect the optional LCD/keypad module. Remove these jumpers (you may park them across pins 7-8 and 11-12 on header JP1) if you do not wish to use the ACT and LNK signals on the LCD/keypad module.

> Figure 16. Header JP1 Configurations for ACT and LNK Signals

> NOTE | The RCM positions for pins 1-2 and 5-6 on header JP1 are reserved for future use and should not be used in customer applications at this time.

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