/*
 *  Copyright (c) 1996-2007 Digi International Inc., All Rights Reserved
 *
 *  This software contains proprietary and confidential information of Digi
 *  International Inc.  By accepting transfer of this copy, Recipient agrees
 *  to retain this software in confidence, to prevent disclosure to others,
 *  and to make no use of this software other than that for which it was
 *  delivered.  This is an unpublished copyrighted work of Digi International
 *  Inc.  Except as permitted by federal law, 17 USC 117, copying is strictly
 *  prohibited.
 *
 *  Restricted Rights Legend
 *
 *  Use, duplication, or disclosure by the Government is subject to
 *  restrictions set forth in sub-paragraph (c)(1)(ii) of The Rights in
 *  Technical Data and Computer Software clause at DFARS 252.227-7031 or
 *  subparagraphs (c)(1) and (2) of the Commercial Computer Software -
 *  Restricted Rights at 48 CFR 52.227-19, as applicable.
 *
 *  Digi International Inc. 11001 Bren Road East, Minnetonka, MN 55343
 *
 */

#ifndef _IOP_API_H
#define _IOP_API_H

#include <Npttypes.h>
#include <nastatus.h>

#ifdef __cplusplus
extern "C"
{
#endif

#define NA_IOP_NUMBER_OF_GENERIC_CONFIG_REGISTERS   (14)

#define NA_IOP_NS9215         (0)

#define NA_IOP_FORMAT_0       (0)

#define NA_IOP_DMA_NCIP        0x1
#define NA_IOP_DMA_NRIP        0x2
#define NA_IOP_DMA_ECIP        0x4
#define NA_IOP_DMA_CAIP        0x8
#define NA_IOP_DMA_CANCELLED   NA_IOP_DMA_CAIP
#define NA_IOP_DMA_FLUSHED     0x10
#define NA_IOP_DMA_SUCCESS     (NA_IOP_DMA_NCIP | NA_IOP_DMA_NRIP)

#define NA_IOP_MAX_PICS             2
#define IOP_MAX_DMA_DESCRIPTORS     64


/*ad*
 * This type will be used to identify which FIM processor an API call is
 * triggered for.
 *
 * @param NA_IOP_PROCESSOR_PIC0     FIM processor 0
 * @param NA_IOP_PROCESSOR_PIC1     FIM processor 1
 *
 * @external
 * @category BSP:Device_Drivers:IOP_DEVICE_API
 * @since 7.3
 *
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopProcessorDownloadPicProgram
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopDmaReceive
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopDmaTransmit
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopDmaFlushQueue
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopProcessorStartAtZero
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopProcessorStopAndReset
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopRegisterSemaphore
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naiopUninstallIsr
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopHwaGenericSetOutputClockDivisor
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopRegisterIsrCallback
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopInterruptProcessor
 *ad*/
typedef enum
{
    NA_IOP_PROCESSOR_PIC0,
    NA_IOP_PROCESSOR_PIC1
} NaIopProcessor_t;


/*ad*
 * This type can be used to enable the required FIM hardware assist mode
 *
 * @param NA_IOP_HW_ASSIST_MODE_NONE     FIM hardware assist disabled
 * @param NA_IOP_HW_ASSIST_MODE_GENERIC  Generic hardware assist enabled
 * @param NA_IOP_HW_ASSIST_MODE_CAN      CAN protocol hardware assist enabled
 *
 * @external
 * @category BSP:Device_Drivers:IOP_DEVICE_API
 * @since 7.3
 *
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopProcessorDownloadPicProgram
 *ad*/
typedef enum
{
    NA_IOP_HW_ASSIST_MODE_NONE,
    NA_IOP_HW_ASSIST_MODE_GENERIC,   
    NA_IOP_HW_ASSIST_MODE_CAN      
} NaIopHwAssistMode_t;


/*ad*
 * This type will be used to select the FIM internal clock generator
 *
 * @param NA_IOP_CLOCK_DIVISOR_2    FIM clock divided by 2
 * @param NA_IOP_CLOCK_DIVISOR_4    FIM clock divided by 4
 * @param NA_IOP_CLOCK_DIVISOR_8    FIM clock divided by 8
 * @param NA_IOP_CLOCK_DIVISOR_16   FIM clock divided by 16
 * @param NA_IOP_CLOCK_DIVISOR_32   FIM clock divided by 32
 * @param NA_IOP_CLOCK_DIVISOR_64   FIM clock divided by 64
 * @param NA_IOP_CLOCK_DIVISOR_128  FIM clock divided by 128
 * @param NA_IOP_CLOCK_DIVISOR_256  FIM clock divided by 256
 *
 * @external
 * @category BSP:Device_Drivers:IOP_DEVICE_API
 * @since 7.3
 *
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopProcessorDownloadPicProgram
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopHwaGenericSetOutputClockDivisor
 *ad*/
typedef enum
{
    NA_IOP_CLOCK_DIVISOR_2,
    NA_IOP_CLOCK_DIVISOR_4,
    NA_IOP_CLOCK_DIVISOR_8,
    NA_IOP_CLOCK_DIVISOR_16,
    NA_IOP_CLOCK_DIVISOR_32,
    NA_IOP_CLOCK_DIVISOR_64,
    NA_IOP_CLOCK_DIVISOR_128,
    NA_IOP_CLOCK_DIVISOR_256
} NaIopOutputClockDivisor_t;


typedef enum
{
    NA_IOP_SIGBUS_SIGNAL_0,
    NA_IOP_SIGBUS_SIGNAL_1,
    NA_IOP_SIGBUS_SIGNAL_2,
    NA_IOP_SIGBUS_SIGNAL_3,
    NA_IOP_SIGBUS_SIGNAL_4,
    NA_IOP_SIGBUS_SIGNAL_5,
    NA_IOP_SIGBUS_SIGNAL_6,
    NA_IOP_SIGBUS_SIGNAL_7,
    NA_IOP_SIGBUS_CONTROL_0,
    NA_IOP_SIGBUS_CONTROL_1,
    NA_IOP_SIGBUS_CONTROL_2,
    NA_IOP_SIGBUS_CONTROL_3,
    NA_IOP_SIGBUS_16_BIT_BUS,
    NA_IOP_SIGBUS_24_BIT_BUS
} NaIopSignalBus_t;

#define NA_IOP_NS9215_MAX_INSTRUCTIONS          (1024)

/*ad*
 * This structure type will consist of FIM configuration values and it will 
 * be used to program the FIM.
 *
 * @param processorType     set to NA_IOP_NS9215
 * @param format            set to NA_IOP_FORMAT_0
 * @param hwMode            indicates the H/W assist mode
 * @param divisor           contains the divisor for the output clock
 * @param genericHwAssist   an array of generic H/W assist register values
 * @param numberOfInstructions	set to indicate the number of FIM instructions that follow
 * @param instruction       array of half words which contain the FIM program, bits 0-13 of 
 *                          each half word are used
 *
 * @external
 * @category BSP:Device_Drivers:IOP_DEVICE_API
 * @since 7.3
 *
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopProcessorDownloadPicProgram
 *ad*/
typedef struct NaIopNs9215Program_t
{
    unsigned processorType;
    unsigned format;
    NaIopHwAssistMode_t hwMode;
    NaIopOutputClockDivisor_t divisor;
    unsigned genericHwAssist[NA_IOP_NUMBER_OF_GENERIC_CONFIG_REGISTERS];
    unsigned numberOfInstructions;
    WORD32 instruction[NA_IOP_NS9215_MAX_INSTRUCTIONS];
} NaIopNs9215Program_t;


/*ad*
 * This structure type will consist of FIM configuration values for NS9215
 * and it will be used to program the FIM for NS9215.
 *
 * @param ns9215Header     NS9215 FIM program structure
 *
 * @external
 * @category BSP:Device_Drivers:IOP_DEVICE_API
 * @since 7.3
 *
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopProcessorDownloadPicProgram
 *ad*/
typedef union
{
    NaIopNs9215Program_t ns9215Header;
} NaIopProgram_t;
    

/*ad*
 * This type defines the callback functions used to return buffers given to 
 * the API with either the naIopDmaTransmit or naIopDmaReceive functions.  
 * The callback will be called when either the DMA transfer completes, or 
 * when naIopDmaFlushQueue is called
 *
 * @param processor	set to indicate which I/O processor
 * @param buffer    pointer to buffer being returned
 * @param length    amount of data in receive buffer, or number of bytes 
 *                  actually transmitted in transmit buffer
 * @param result    set to indicate the result of the transfer
 *                  <list type="ordered">
 *                  <item> NA_IOP_DMA_SUCCESS indicates the transfer succeeded </item> 
 *                  <item> NA_IOP_DMA_CANCELED indicates the DMA transfer was aborted </item> 
 *                  <item> NA_IOP_DMA_FLUSHED indicates the buffer was flushed from the DMA ring </item>
 *                  <item> NA_IOP_DMA_ECIP indicates error during DMA transfer </item>
 *                  </list>
 * @param context   value set in naIopDmaReceive and naIopDmaTransmit
 *
 * @external
 * @category BSP:Device_Drivers:IOP_DEVICE_API
 * @since 7.3
 *
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopDmaReceive
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopDmaTransmit
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopDmaFlushQueue
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:NaIopProcessor_t
 *ad*/
typedef void (* NaIopDmaCallback_t)(NaIopProcessor_t processor, void * buffer, unsigned length, unsigned result, void * context);

/*ad*
 * This type defines the callback function used to receive interrupts from 
 * the FIM processor.  The interruptCode set the by FIM is passed as a 
 * parameter to the callback
 *
 * @param processor     set to indicate which I/O processor
 * @param context       this value argument will be set to the value of the 
 *                      context argument passed to naIopRegisterIsrCallback
 * @param interruptCode interruptCode set by the FIM
 *
 * @external
 * @category BSP:Device_Drivers:IOP_DEVICE_API
 * @since 7.3
 *
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naiopUninstallIsr
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopRegisterIsrCallback
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopInterruptProcessor
 *ad*/
typedef void (* NaIopIsrCallback_t)(NaIopProcessor_t processor, void * context, unsigned interruptCode);

/*ad*
 * This type defines the callback functions used to get and release semaphores
 *
 * @param context     context for semaphore function
 *
 * @external
 * @category BSP:Device_Drivers:IOP_DEVICE_API
 * @since 7.3
 *
 * @see @link BSP:Device_Drivers:IOP_DEVICE_API:naIopRegisterSemaphore
 *ad*/
typedef void (* NaIopSemaphoreFn_t)(void * context);

NaStatus naIopDmaFlushQueue(NaIopProcessor_t processor, unsigned isTransmitQueue);
NaStatus naIopDmaReceive(NaIopProcessor_t processor, void *buffer, unsigned maxLength, NaIopDmaCallback_t receiveCallback, void *context);
NaStatus naIopDmaTransmit(NaIopProcessor_t processor, void *buffer, unsigned length, NaIopDmaCallback_t transmitCallback, void *context);
NaStatus naIopHwaGenericSetOutputClockDivisor(NaIopProcessor_t processor, NaIopOutputClockDivisor_t divisor);
NaStatus naIopRegisterIsrCallback(NaIopProcessor_t processor, NaIopIsrCallback_t isr, void *context);
NaStatus naIopInterruptProcessor(NaIopProcessor_t processor, unsigned interruptCode);
NaStatus naIopProcessorDownloadPicProgram(NaIopProcessor_t processor, NaIopProgram_t const * program);
NaStatus naIopProcessorStartAtZero(NaIopProcessor_t processor);
NaStatus naIopProcessorStopAndReset(NaIopProcessor_t processor);
NaStatus naIopRegisterSemaphore(NaIopProcessor_t processor, NaIopSemaphoreFn_t getSemaphore, NaIopSemaphoreFn_t releaseSemaphore, void *context);
NaStatus naiopUninstallIsr(NaIopProcessor_t processor);
void naIopGetSemaphore(NaIopProcessor_t processor);
void naIopPutSemaphore(NaIopProcessor_t processor);

#ifdef __cplusplus
}
#endif

#endif


