/*
 *  Copyright (c) 1996-2007 Digi International Inc., All Rights Reserved
 *
 *  This software contains proprietary and confidential information of Digi
 *  International Inc.  By accepting transfer of this copy, Recipient agrees
 *  to retain this software in confidence, to prevent disclosure to others,
 *  and to make no use of this software other than that for which it was
 *  delivered.  This is an unpublished copyrighted work of Digi International
 *  Inc.  Except as permitted by federal law, 17 USC 117, copying is strictly
 *  prohibited.
 *
 *  Restricted Rights Legend
 *
 *  Use, duplication, or disclosure by the Government is subject to
 *  restrictions set forth in sub-paragraph (c)(1)(ii) of The Rights in
 *  Technical Data and Computer Software clause at DFARS 252.227-7031 or
 *  subparagraphs (c)(1) and (2) of the Commercial Computer Software -
 *  Restricted Rights at 48 CFR 52.227-19, as applicable.
 *
 *  Digi International Inc. 11001 Bren Road East, Minnetonka, MN 55343
 *
 * =======================================================================
 * This module is responsible for disableing clock to the modules which
 * are not started yet or not used.
 *
 * Edit Date/Ver   Edit Description
 * ==============  ===================================================
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <Npttypes.h>

#ifdef BSP_ARM9
#include <scm_reg.h>

/*
 * This routine is called from main() and disables the Ethernet MAC.  We
 * can't disable the Ethernet MAC in customizeClockDisable because that is
 * called from nccInit, and nccInit uses memory inside of the Ethernet module
 * for a temporary stack.
 */
void customizeClockDisableMain(void)
{
    #if (PROCESSOR == ns9210) || (PROCESSOR == ns9215)
        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, ethernetMac, 0);
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, ethernetMac, 0);
    #endif
}


void customizeClockDisable(unsigned int *ramSizes)
{
    
    if (ramSizes)
    {
	    /*
	    * Disable clocks on unused chip selects and other devices to reduce EMI noise.
	    */
	    narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, memoryClock0, (ramSizes[0] != 0)?SCM_CCR_ENABLE_MEM_CLOCK:SCM_CCR_DISABLE_MEM_CLOCK);
	    narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, memoryClock1, (ramSizes[1] != 0)?SCM_CCR_ENABLE_MEM_CLOCK:SCM_CCR_DISABLE_MEM_CLOCK);
	    narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, memoryClock2, (ramSizes[2] != 0)?SCM_CCR_ENABLE_MEM_CLOCK:SCM_CCR_DISABLE_MEM_CLOCK);
	    narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, memoryClock3, (ramSizes[3] != 0)?SCM_CCR_ENABLE_MEM_CLOCK:SCM_CCR_DISABLE_MEM_CLOCK);

	    narm_write_reg(NA_SCM_DYNAMIC_CS_MASK_REG, NA_SCM_SMCS_DYNAMIC_MEM_MASK(0), enable, (ramSizes[0] != 0));
	    narm_write_reg(NA_SCM_DYNAMIC_CS_MASK_REG, NA_SCM_SMCS_DYNAMIC_MEM_MASK(1), enable, (ramSizes[1] != 0));
	    narm_write_reg(NA_SCM_DYNAMIC_CS_MASK_REG, NA_SCM_SMCS_DYNAMIC_MEM_MASK(2), enable, (ramSizes[2] != 0));
	    narm_write_reg(NA_SCM_DYNAMIC_CS_MASK_REG, NA_SCM_SMCS_DYNAMIC_MEM_MASK(3), enable, (ramSizes[3] != 0));
    }

    #if (PROCESSOR == ns9210) || (PROCESSOR == ns9215)
    /*
     * Just turning off some clocks for devices that aren't needed yet.
     * This will reduce EMI emissions.  The drivers for these devices will
     * turn the clocks on if the devices are needed.
     */
        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, rtc, 0);
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, rtc, SCM_RSR_RESET_MODULE);

        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, reserved1, 0);
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, reserved1, SCM_RSR_RESET_MODULE);

        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, reserved2, 0);
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, reserved2, SCM_RSR_RESET_MODULE);

        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, reserved3, 0);
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, reserved3, SCM_RSR_RESET_MODULE);

        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, iop0, 0);
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, iop0, SCM_RSR_RESET_MODULE);

        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, iop1, 0);
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, iop1, SCM_RSR_RESET_MODULE);
#if 0
        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, aes, 0);       
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, aes, SCM_RSR_RESET_MODULE);       
#endif
        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, adc, 0);       
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, adc, SCM_RSR_RESET_MODULE);       
#if 0
        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, externalDma, 0);
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, externalDma, SCM_RSR_RESET_MODULE);
#endif
        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, i2c, 0);
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, i2c, SCM_RSR_RESET_MODULE);

        narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, spi, 0);
        narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, spi, SCM_RSR_RESET_MODULE);
        
        #if (BSP_SIMPLE_SERIAL_PORT != BSP_SIMPLE_SERIAL_ON_PORTD)
            narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, uartd, 0);
            narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, uartd, SCM_RSR_RESET_MODULE);
        #endif
        #if (BSP_SIMPLE_SERIAL_PORT != BSP_SIMPLE_SERIAL_ON_PORTC)
            narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, uartc, 0);
            narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, uartc, SCM_RSR_RESET_MODULE);
        #endif
        #if (BSP_SIMPLE_SERIAL_PORT != BSP_SIMPLE_SERIAL_ON_PORTB)
            narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, uartb, 0);
            narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, uartb, SCM_RSR_RESET_MODULE);
        #endif
        #if (BSP_SIMPLE_SERIAL_PORT != BSP_SIMPLE_SERIAL_ON_PORTA)
            narm_write_reg(NA_SCM_CCR_REG, NA_SCM_CCR_ADDRESS, uarta, 0);
            narm_write_reg(NA_SCM_RSR_REG, NA_SCM_RSR_ADDRESS, uarta, SCM_RSR_RESET_MODULE);
        #endif

    #endif    
}

#endif /* BSP_ARM9 */

