/*
 *  Copyright (c) 1996-2007 Digi International Inc., All Rights Reserved
 *
 *  This software contains proprietary and confidential information of Digi
 *  International Inc.  By accepting transfer of this copy, Recipient agrees
 *  to retain this software in confidence, to prevent disclosure to others,
 *  and to make no use of this software other than that for which it was
 *  delivered.  This is an unpublished copyrighted work of Digi International
 *  Inc.  Except as permitted by federal law, 17 USC 117, copying is strictly
 *  prohibited.
 *
 *  Restricted Rights Legend
 *
 *  Use, duplication, or disclosure by the Government is subject to
 *  restrictions set forth in sub-paragraph (c)(1)(ii) of The Rights in
 *  Technical Data and Computer Software clause at DFARS 252.227-7031 or
 *  subparagraphs (c)(1) and (2) of the Commercial Computer Software -
 *  Restricted Rights at 48 CFR 52.227-19, as applicable.
 *
 *  Digi International Inc. 11001 Bren Road East, Minnetonka, MN 55343
 *
 * =======================================================================
 * USB host and devices
 *                                                                        
 * Edit Date/Ver   Edit Description
 * ==============  ===================================================
 * 
 *
 */

#ifndef USBREG_DEF_H
#define USBREG_DEF_H

#include <mcreg_def.h>

#if ((PROCESSOR != ns9210) && (PROCESSOR != ns9215))

#ifdef __cplusplus
extern "C"
{
#endif

#if defined(NS9360)

/************************************************************/
/*         USB  BLOCK Register                   Offset     */
/************************************************************/
#define NA_USB_GLOBAL_REGISTER_ADDRESS      0x90900000      
#define NA_USB_DEVICE_BLOCK_ADDRESS         0x90902000
#define NA_USB_DEVICE_ENDPOINT_FIFOS        0x90903000
#define NA_USB_DEVICE_DMA_ADDRESS           0x90910000
#else  /* NS9750 */
/************************************************************/
/*         USB  BLOCK Register                   Offset     */
/************************************************************/
#define NA_USB_GLOBAL_REGISTER_ADDRESS      0x90100000      
#define NA_USB_HOST_BLOCK_ADDRESS           0x90101000
#define NA_USB_DEVICE_BLOCK_ADDRESS         0x90102000
#define NA_USB_DEVICE_ENDPOINT_FIFOS        0x90103000
#define NA_USB_DEVICE_DMA_ADDRESS           0x90110000
#endif


/********************************************************/
/*      USB GLOBAL Register                             */
/********************************************************/


#if defined(NS9360)
/* Address Offset */
#define NA_USB_GCSR_ADDRESS     ((unsigned long volatile *) (NA_USB_GLOBAL_REGISTER_ADDRESS))
#define NA_USB_DCSR_ADDRESS     ((unsigned long volatile *) (NA_USB_GLOBAL_REGISTER_ADDRESS + 0x04))
#define NA_USB_GIE_ADDRESS      ((unsigned long volatile *) (NA_USB_GLOBAL_REGISTER_ADDRESS + 0x0C))
#define NA_USB_GIS_ADDRESS      ((unsigned long volatile *) (NA_USB_GLOBAL_REGISTER_ADDRESS + 0x10))
#else
/* Address Offset */
#define NA_USB_GCSR_ADDRESS     ((unsigned long volatile *) (NA_USB_GLOBAL_REGISTER_ADDRESS))
#define NA_USB_DCSR_ADDRESS     ((unsigned long volatile *) (NA_USB_GLOBAL_REGISTER_ADDRESS + 0x04))
#define NA_USB_HCSR_ADDRESS     ((unsigned long volatile *) (NA_USB_GLOBAL_REGISTER_ADDRESS + 0x08))
#define NA_USB_GIE_ADDRESS      ((unsigned long volatile *) (NA_USB_GLOBAL_REGISTER_ADDRESS + 0x0C))
#define NA_USB_GIS_ADDRESS      ((unsigned long volatile *) (NA_USB_GLOBAL_REGISTER_ADDRESS + 0x10))
#endif

/********************************************************/
/*      USB Device Block Register                       */
/********************************************************/

#define NA_USB_DDSC_ADDRESS       ((unsigned long *) (NA_USB_GLOBAL_REGISTER_ADDRESS + 0x2000))
  /* Physical endpoint descriptor */
#define NA_USB_PED_ADDRESS(x)    ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x4 + 0x4 * x))
#define NA_USB_PED_ADDRESS_0     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x4 + 0x4 * 0))
#define NA_USB_PED_ADDRESS_1     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x4 + 0x4 * 1))
#define NA_USB_PED_ADDRESS_2     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x4 + 0x4 * 2))
#define NA_USB_PED_ADDRESS_3     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x4 + 0x4 * 3))
#define NA_USB_PED_ADDRESS_4     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x4 + 0x4 * 4))
#define NA_USB_PED_ADDRESS_5     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x4 + 0x4 * 5))
#define NA_USB_PED_ADDRESS_6     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x4 + 0x4 * 6))

  /* Configuration descriptor */
#define NA_USB_CD_ADDRESS(x)     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x34 + 0x4 * x))
#define NA_USB_CD_ADDRESS_0      ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x34 + 0x4 * 0))
#define NA_USB_CD_ADDRESS_1      ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x34 + 0x4 * 1))
#define NA_USB_CD_ADDRESS_2      ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x34 + 0x4 * 2))
#define NA_USB_CD_ADDRESS_3      ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x34 + 0x4 * 3))
#define NA_USB_CD_ADDRESS_4      ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x34 + 0x4 * 4))

  /* String descriptor identifier */
#define NA_USB_SDI_ADDRESS(x)    ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x48 + 0x4 * x)) 
#define NA_USB_SDI_ADDRESS_0     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x48 + 0x4 * 0)) 
#define NA_USB_SDI_ADDRESS_1     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x48 + 0x4 * 1)) 
#define NA_USB_SDI_ADDRESS_2     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x48 + 0x4 * 2)) 
#define NA_USB_SDI_ADDRESS_3     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x48 + 0x4 * 3)) 
#define NA_USB_SDI_ADDRESS_4     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x48 + 0x4 * 4)) 
#define NA_USB_SDI_ADDRESS_5     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x48 + 0x4 * 5)) 
#define NA_USB_SDI_ADDRESS_6     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x48 + 0x4 * 6)) 
#define NA_USB_SDI_ADDRESS_7     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x48 + 0x4 * 7)) 
#define NA_USB_SDI_ADDRESS_8     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x48 + 0x4 * 8)) 
#define NA_USB_SDI_ADDRESS_9     ((unsigned long volatile *) (NA_USB_DEVICE_BLOCK_ADDRESS + 0x48 + 0x4 * 9)) 

  /* DMA channel x Buffer Descriptor Pointer, Control Register and Status-Interrupt Enable Reg */
#define NA_USB_DEVICE_DMA_BDP(x)    ((unsigned long volatile *) (NA_USB_DEVICE_DMA_ADDRESS + 0x20 * x))
#define NA_USB_DEVICE_DMA_CCR(x)    ((unsigned long volatile *) (NA_USB_DEVICE_DMA_ADDRESS + 0x10 + 0x20 * x))
#define NA_USB_DEVICE_DMA_SIER(x)   ((unsigned long volatile *) (NA_USB_DEVICE_DMA_ADDRESS + 0x14 + 0x20 * x))


/***********************************************************/
/*      USB Device Endpoint Fifo Control and Data Register */
/***********************************************************/


#define NA_USB_DEVICE_FIFO_STATUS_CONTROL           0x0000
#define NA_USB_DEVICE_FIFO_STATUS_ISOCRONOUS        0x100000
#define NA_USB_DEVICE_FIFO_STATUS_BULK              0x200000
#define NA_USB_DEVICE_FIFO_STATUS_INTERRUPT         0x300000
#define NA_USB_DEVICE_FIFO_STATUS_CLR               0x80000
#define NA_USB_DEVICE_FIFO_STATUS_DIR_IN            0x40000
#define NA_USB_DEVICE_FIFO_STATUS_DIR_OUT           0x0000 


  /* Fifo interrupt status register */
#define NA_USB_FIFOIS_ADDRESS(x) ((unsigned long volatile *) (NA_USB_DEVICE_ENDPOINT_FIFOS + 0x10 * x))
  /* Fifo enable register           */
#define NA_USB_FIFOIE_ADDRESS(x) ((unsigned long volatile *) (NA_USB_DEVICE_ENDPOINT_FIFOS + 0x10 * x + 4))
  /* Fifo Packet Control register   */
#define NA_USB_FIFOPC_ADDRESS(x) ((unsigned long volatile *) (NA_USB_DEVICE_ENDPOINT_FIFOS + 0x80 + 4 * x))
  /* Fifo status and control register */
#define NA_USB_FIFOSNC_ADDRESS(x) ((unsigned long volatile *)(NA_USB_DEVICE_ENDPOINT_FIFOS + 0x100 + 8 * x))
  /* Fifo data register             */
#define NA_USB_FIFODATA_ADDRESS(x) ((unsigned long volatile *) (NA_USB_DEVICE_ENDPOINT_FIFOS + 0x104 + 8 * x))

  /* USB DMA buffer length */
#define CONTROL_CHANNEL_BUFFER_OUT_SIZE_0             0x10
#define CONTROL_CHANNEL_BUFFER_IN_SIZE_0              0x10
#define BULK_CHANNEL_BUFFER_IN_SIZE                   0x40
#define BULK_CHANNEL_BUFFER_OUT_SIZE                  0x40

       
/***********************************************************/
/*      USB Device IP constant definition                  */
/***********************************************************/

/* The following are the PARTIAL address pointer for various setup request from the USB host */
#define USB_DEVICE_IP_SETUP_COMMAND_ADDR_PTR           0x0100  
#define USB_DEVICE_IP_DEVICE_DESC_ADDR_PTR             0x0200   /* Its in the upper 16 bit */
#define USB_DEVICE_IP_CONFIG_DESC_ADDR_PTR_0           0x0400
#define USB_DEVICE_IP_CONFIG_DESC_ADDR_PTR_1           0x0500
#define USB_DEVICE_IP_CONFIG_DESC_ADDR_PTR_2           0x0600
#define USB_DEVICE_IP_CONFIG_DESC_ADDR_PTR_3           0x0700
#define USB_DEVICE_IP_CONFIG_DESC_ADDR_PTR_4           0x0800
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_0              0x0910
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_1              0x0920
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_2              0x0930
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_3              0x0940
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_4              0x0950
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_5              0x0960
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_6              0x0970
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_7              0x0980
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_8              0x0990
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_9              0x09A0
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_A              0x09B0
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_B              0x09C0
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_C              0x09D0
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_D              0x09E0
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_E              0x09F0
#define USB_DEVICE_IP_STR_DESC_ADDR_PTR_F              0x0A00


#if defined(NS9360)
/****************************************************************/
/*       UDFE Control and Status Register 0                     */
/****************************************************************/ 
#define NARM_USB_GC_REG_unused     31, 11
#define NARM_USB_GC_REG_dev_reset  10,  9
#define NARM_USB_GC_REG_pll_reset   8,  8
#define NARM_USB_GC_REG_unused1     7,  6
#define NARM_USB_GC_REG_susp        5,  5
#define NARM_USB_GC_REG_unused2     4,  3
#define NARM_USB_GC_REG_wakeup      2,  2
#define NARM_USB_GC_REG_unused3     1,  0
#else
/****************************************************************/
/*       Global Control and Status Register                     */
/****************************************************************/ 
#define NARM_USB_GC_REG_unused     31, 13
#define NARM_USB_GC_REG_disable    12, 12
#define NARM_USB_GC_REG_host_reset 11, 11
#define NARM_USB_GC_REG_dev_reset  10,  9
#define NARM_USB_GC_REG_pll_reset   8,  8
#define NARM_USB_GC_REG_dma_reset   7,  7
#define NARM_USB_GC_REG_dma_test    6,  6
#define NARM_USB_GC_REG_susp        5,  5
#define NARM_USB_GC_REG_loopback    4,  4
#define NARM_USB_GC_REG_sof         3,  3
#define NARM_USB_GC_REG_wakeup      2,  2
#define NARM_USB_GC_REG_mode_rw     1,  1
#define NARM_USB_GC_REG_hst_dev     0,  0
#endif

#if defined(NS9360)
/****************************************************************/
/*       UDFE Control and Status Register 1                     */
/****************************************************************/ 
#define NARM_USB_DCS_REG_resume      31, 31
#define NARM_USB_DCS_REG_unused      30, 30
#define NARM_USB_DCS_REG_self_pwr    29, 29
#define NARM_USB_DCS_REG_set_desc    28, 28
#define NARM_USB_DCS_REG_sync        27, 27
#define NARM_USB_DCS_REG_urst        26, 26
#define NARM_USB_DCS_REG_unused1     25, 23
#define NARM_USB_DCS_REG_frame       22, 12
#define NARM_USB_DCS_REG_alt         11,  8
#define NARM_USB_DCS_REG_intf         7,  4
#define NARM_USB_DCS_REG_cfg          3,  0
#else
/****************************************************************/
/*       Device Control and Status Register                     */
/****************************************************************/ 
#define NARM_USB_DCS_REG_resume      31, 31
#define NARM_USB_DCS_REG_vci_stall   30, 30
#define NARM_USB_DCS_REG_self_pwr    29, 29
#define NARM_USB_DCS_REG_set_desc    28, 28
#define NARM_USB_DCS_REG_sof         27, 27
#define NARM_USB_DCS_REG_urst        26, 26
#define NARM_USB_DCS_REG_vci_abort   25, 25
#define NARM_USB_DCS_REG_setintf     24, 24
#define NARM_USB_DCS_REG_setcfg      23, 23
#define NARM_USB_DCS_REG_frame       22, 12
#define NARM_USB_DCS_REG_alt         11,  8
#define NARM_USB_DCS_REG_intf         7,  4
#define NARM_USB_DCS_REG_cfg          3,  0
#endif


/****************************************************************/
/*       Host Control and Status Register                       */
/****************************************************************/ 

#define NARM_USB_HC_REG_unused     31, 6
#define NARM_USB_HC_REG_ovrcrnt     5, 5
#define NARM_USB_HC_REG_legacy      4, 4
#define NARM_USB_HC_REG_buffer      3, 3
#define NARM_USB_HC_REG_drwe        2, 2
#define NARM_USB_HC_REG_rwe         1, 1
#define NARM_USB_HC_REG_ccs         0, 0


#define NARM_USB_GIE_REG_all      31, 0
#if defined(NS9360)

/****************************************************************/
/*       UDFE Interrupt Enable Register                         */
/****************************************************************/ 
#define NARM_USB_GIE_REG_gbl_en      31, 31          
#define NARM_USB_GIE_REG_unused      30, 28          
#define NARM_USB_GIE_REG_gbl_dma     27, 27          
#define NARM_USB_GIE_REG_dma         26, 14       
#define NARM_USB_GIE_REG_unused1     13, 13         
#define NARM_USB_GIE_REG_fifo        12, 12          
#define NARM_USB_GIE_REG_urst        11, 11          
#define NARM_USB_GIE_REG_sof         10, 10          
#define NARM_USB_GIE_REG_suspend      9,  9           
#define NARM_USB_GIE_REG_setintf      8,  8         
#define NARM_USB_GIE_REG_setcfg       7,  7               
#define NARM_USB_GIE_REG_reserved     6,  6           
#define NARM_USB_GIE_REG_unused2      5,  0          
#else

/****************************************************************/
/*       Global Interrupt Enable Register                       */
/****************************************************************/ 

#define NARM_USB_GIE_REG_gbl_en      31, 31          
#define NARM_USB_GIE_REG_vci_stall   30, 30          
#define NARM_USB_GIE_REG_unused      29, 28       
#define NARM_USB_GIE_REG_gbl_dma     27, 27          
#define NARM_USB_GIE_REG_dma         26, 14       
#define NARM_USB_GIE_REG_vci_abort   13, 13         
#define NARM_USB_GIE_REG_fifo        12, 12          
#define NARM_USB_GIE_REG_urst        11, 11          
#define NARM_USB_GIE_REG_sof         10, 10          
#define NARM_USB_GIE_REG_suspend      9,  9           
#define NARM_USB_GIE_REG_setintf      8,  8         
#define NARM_USB_GIE_REG_setcfg       7,  7               
#define NARM_USB_GIE_REG_waitup       6,  6           
#define NARM_USB_GIE_REG_buffer       5,  5          
#define NARM_USB_GIE_REG_drwe         4,  4           
#define NARM_USB_GIE_REG_rwe          3,  3         
#define NARM_USB_GIE_REG_ccs          2,  2               
#define NARM_USB_GIE_REG_ohci_irq     1,  1           
#define NARM_USB_GIE_REG_ohci_smi     0,  0               
#endif
    

#define NA_USB_GLOBAL_INTERRUPT_FIFO_BIT      0x00001000      /* bit 12 position */
#define NA_USB_GLOBAL_INTERRUPT_DMA_BIT(x)    1 << (x+14)     /* bit 14 and up   */
#define NA_USB_GLOBAL_INTERRUPT_DMA_MASK      0x07ffc000      /* bit 14 to 26    */

#define NA_USB_GLOBAL_INTERRUPT_DMA_CH0       0x00004000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH1       0x00008000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH2       0x00010000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH3       0x00020000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH4       0x00040000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH5       0x00080000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH6       0x00100000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH7       0x00200000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH8       0x00400000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH9       0x00800000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH10      0x01000000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH11      0x02000000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH12      0x04000000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH0TO1    0x0000c000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH0TO2    0x0001c000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH0TO5    0x000fc000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH3TO4    0x00060000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH3TO5    0x000e0000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH6TO7    0x00300000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH6TO9    0x00f00000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH6TO12   0x07f00000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH8TO9    0x00c00000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH10TO12  0x07000000
#define NA_USB_GLOBAL_INTERRUPT_DMA_CH10TO11  0x03000000


#define NA_USB_GIS_REG_all      31, 0
#if defined(NS9360)
/****************************************************************/
/*       UDFE Interrupt STATUS Register                         */
/****************************************************************/ 
#define NA_USB_GIS_REG_unused      31, 28           
#define NA_USB_GIS_REG_gbl_dma     27, 27           
#define NA_USB_GIS_REG_dma         26, 14        
#define NA_USB_GIS_REG_unused1     13, 13          
#define NA_USB_GIS_REG_fifo        12, 12           
#define NA_USB_GIS_REG_urst        11, 11           
#define NA_USB_GIS_REG_sof         10, 10           
#define NA_USB_GIS_REG_suspend      9,  9            
#define NA_USB_GIS_REG_setintf      8,  8          
#define NA_USB_GIS_REG_setcfg       7,  7              
#define NA_USB_GIS_REG_reserved     6,  6          
#define NA_USB_GIS_REG_unused2      5,  0
#else
/****************************************************************/
/*       Global Interrupt STATUS Register                       */
/****************************************************************/ 
#define NA_USB_GIS_REG_unused      31, 31           
#define NA_USB_GIS_REG_vci_stall   30, 30           
#define NA_USB_GIS_REG_unused1     29, 28        
#define NA_USB_GIS_REG_gbl_dma     27, 27           
#define NA_USB_GIS_REG_dma         26, 14        
#define NA_USB_GIS_REG_vci_abort   13, 13          
#define NA_USB_GIS_REG_fifo        12, 12           
#define NA_USB_GIS_REG_urst        11, 11           
#define NA_USB_GIS_REG_sof         10, 10           
#define NA_USB_GIS_REG_suspend      9,  9            
#define NA_USB_GIS_REG_setintf      8,  8          
#define NA_USB_GIS_REG_setcfg       7,  7              
#define NA_USB_GIS_REG_waitup       6,  6          
#define NA_USB_GIS_REG_buffer       5,  5          
#define NA_USB_GIS_REG_drwe         4,  4          
#define NA_USB_GIS_REG_rwe          3,  3          
#define NA_USB_GIS_REG_ccs          2,  2              
#define NA_USB_GIS_REG_ohci_irq     1,  1          
#define NA_USB_GIS_REG_ohci_smi     0,  0              
#endif




/****************************************************************/
/*       USB Device Block Registers                             */
/*       Configuration Descriptor #0                            */
/****************************************************************/ 


#define NA_USB_SCD_REG_unused     31, 24
#define NA_USB_SCD_REG_size       23, 16
#define NA_USB_SCD_REG_id         15,  0 





/****************************************************************/
/*       USB Device Block Registers                             */
/*       FIFO Packet Control Register                           */
/****************************************************************/ 

#define NA_USB_PC_REG_unused   31, 30 
#define NA_USB_PC_REG_max      29, 20 
#define NA_USB_PC_REG_unused1  19, 16 
#define NA_USB_PC_REG_count    15,  0 


#if defined(NS9360)

/****************************************************************/
/*       USB Device Block Registers                             */
/*       UDFE FIFO Status and Control Register                  */
/****************************************************************/ 

#define NARM_USB_FIFOS_REG_unused       31, 24
#define NARM_USB_FIFOS_REG_stall_sent   23, 23
#define NARM_USB_FIFOS_REG_send_stall   22, 22      
#define NARM_USB_FIFOS_REG_type         21, 20
#define NARM_USB_FIFOS_REG_clr          19, 19
#define NARM_USB_FIFOS_REG_dir          18, 18
#define NARM_USB_FIFOS_REG_unused1      17, 14
#define NARM_USB_FIFOS_REG_M31          13, 13
#define NARM_USB_FIFOS_REG_M30          12, 12  
#define NARM_USB_FIFOS_REG_overflow     11, 11
#define NARM_USB_FIFOS_REG_timeout      11, 11
#define NARM_USB_FIFOS_REG_unused2      10, 4
#define NARM_USB_FIFOS_REG_timeout_cnt  3, 0
#else
/****************************************************************/
/*       USB Device Block Registers                             */
/*       FIFO Status Register                                   */
/****************************************************************/ 

#define NARM_USB_FIFOS_REG_status    31, 31
#define NARM_USB_FIFOS_REG_nack      30, 30
#define NARM_USB_FIFOS_REG_error     29, 29
#define NARM_USB_FIFOS_REG_full      28, 28         
#define NARM_USB_FIFOS_REG_empty     27, 27
#define NARM_USB_FIFOS_REG_half      26, 26
#define NARM_USB_FIFOS_REG_oflow     25, 25
#define NARM_USB_FIFOS_REG_uflow     24, 24
#define NARM_USB_FIFOS_REG_stall     23, 22
#define NARM_USB_FIFOS_REG_type      21, 20      
#define NARM_USB_FIFOS_REG_clr       19, 19
#define NARM_USB_FIFOS_REG_dir       18, 18
#define NARM_USB_FIFOS_REG_fdb       17, 16
#define NARM_USB_FIFOS_REG_state     15, 14
#define NARM_USB_FIFOS_REG_complete  13, 13       /* Table 7-1 in the UDCVCI Core */
#define NARM_USB_FIFOS_REG_setup     12, 12
#define NARM_USB_FIFOS_REG_cia       11,  0
#endif

#define NA_USB_FIFO_CIA_MASK           0x0FFF
#define NA_USB_FIFO_SETUP_MASK         0x1000
#define NA_USB_FIFO_COMPLETE_MASK      0x2000
#define NA_USB_FIFO_STATE_MASK         0xC000

/* IP register definition */

#define NARM_USB_IP_DDSCAR_REG_ddap    31, 16
#define NARM_USB_IP_DDSCAR_REG_scap    15,  0



#define NARM_USB_IP_CR_REG_cds         31, 16      /* configuration descriptor size            */
#define NARM_USB_IP_CR_REG_cdap        15,  0      /* configuration descriptor address pointer */




#define NARM_USB_IP_EP_REG_reserved        31, 29  /* Reserved                                      */
#define NARM_USB_IP_EP_REG_maxPacketSize   28, 19  /* Maximum packet size                           */
#define NARM_USB_IP_EP_REG_altEp           18, 15  /* Alternate setting to which this endpoint belongs */
#define NARM_USB_IP_EP_REG_interfaceEp     14, 11  /* Interface number to which this endpoint belongs  */
#define NARM_USB_IP_EP_REG_configEp        10,  7  /* Configuration number this endpoint belongs       */
#define NARM_USB_IP_EP_REG_epType           6,  5  /* Endpoint type                                    */
#define NARM_USB_IP_EP_REG_epDir            4,  4  /* Endpoint direction                               */
#define NARM_USB_IP_EP_REG_epNum            3,  0  /* Endpoint number                                  */


#define NARM_USB_IP_STRING_REG_reserved        31, 24  /* Reserved                                         */
#define NARM_USB_IP_STRING_REG_strDescSize     23, 16  /* String descriptor size                           */
#define NARM_USB_IP_STRING_REG_strDescAddr     15,  0  /* String descriptor address pointer                */


#define READ_REG32A(b) (*(volatile unsigned int *) b)

#ifdef NS9750
#define NA_BBUS_UTILITY_usb     1,1
#define NA_BBUS_UTILITY_usbhost 1,1
#else
#define NA_BBUS_UTILITY_usb     12,12
#define NA_BBUS_UTILITY_usbhost 11,11
#endif

#ifdef __cplusplus
}
#endif

#endif

#endif
