/*
 *  Copyright (c) 1996-2007 Digi International Inc., All Rights Reserved
 *
 *  This software contains proprietary and confidential information of Digi
 *  International Inc.  By accepting transfer of this copy, Recipient agrees
 *  to retain this software in confidence, to prevent disclosure to others,
 *  and to make no use of this software other than that for which it was
 *  delivered.  This is an unpublished copyrighted work of Digi International
 *  Inc.  Except as permitted by federal law, 17 USC 117, copying is strictly
 *  prohibited.
 *
 *  Restricted Rights Legend
 *
 *  Use, duplication, or disclosure by the Government is subject to
 *  restrictions set forth in sub-paragraph (c)(1)(ii) of The Rights in
 *  Technical Data and Computer Software clause at DFARS 252.227-7031 or
 *  subparagraphs (c)(1) and (2) of the Commercial Computer Software -
 *  Restricted Rights at 48 CFR 52.227-19, as applicable.
 *
 *  Digi International Inc. 11001 Bren Road East, Minnetonka, MN 55343
 *
 */

#ifndef _ONE_WIRE_H
#define _ONE_WIRE_H

#include <tx_api.h>
#include <iop_api.h>
#include <iohub_reg.h>
#include <onewire_api.h>

#ifdef __cplusplus
extern "C"
{
#endif

/* IOP control registers */
#define NA_IOHUB_CONTROL_BASE               (0x90001010)
#define NA_IOHUB_CONTROL_getAddress(pic, index)  ((unsigned long volatile *)(NA_IOHUB_CONTROL_BASE + (pic * NA_IOHUB_ADDRESS_INCREMENT)) + index)

/* interrupts code from driver to FIM */
#define INTR_TLOW1       0x01
#define INTR_TSLOT       0x02  /* tSLOT - tLOW1 */
#define INTR_TLOW0       0x03
#define INTR_TREC        0x04
#define INTR_TLOWR       0x05
#define INTR_TSAMPL      0x06  /* tRDV - tLOWR */
#define INTR_TRELEASE    0x07
#define INTR_TRESET      0x08

/* FIM status */
#define NA_1WIRE_INIT_COMPLETE      0x01

/* onewire commands */
#define NA_1WIRE_RST     0
#define NA_1WIRE_READ    1
#define NA_1WIRE_WRITE   2

/* number of ticks reset has to wait */
#define NA_1WIRE_RSTWAIT   10    /* in ticks */

#ifdef __cplusplus
}
#endif

#endif /* _ONE_WIRE_H */
