/*++
 * Copyright (c) 1990-96 Digi International Inc., All Rights Reserved
 * 
 * This software contains proprietary and confidential information of Digi
 * International Inc.  By accepting transfer of this copy, Recipient agrees
 * to retain this software in confidence, to prevent disclosure to others,
 * and to make no use of this software other than that for which it was
 * delivered.  This is an unpublished copyrighted work of Digi International
 * Inc.  Except as permitted by federal law, 17 USC 117, copying is strictly
 * prohibited.
 * 
 * Restricted Rights Legend
 *
 * Use, duplication, or disclosure by the Government is subject to
 * restrictions set forth in sub-paragraph (c)(1)(ii) of The Rights in
 * Technical Data and Computer Software clause at DFARS 252.227-7031 or
 * subparagraphs (c)(1) and (2) of the Commercial Computer Software -
 * Restricted Rights at 48 CFR 52.227-19, as applicable.
 *
 * Digi International Inc. 11001 Bren Road East, Minnetonka, MN 55343
 *
 *
 * Last Update: $Date: 10/22/97 11:56a $
 *
 * $Header: /Components/Windows/NT/Sync/Build/Mp570/ioctls.h 3     10/22/97 11:56a Darinh $
 *
 * Revision History:
 * $Log: /Components/Windows/NT/Sync/Build/Mp570/ioctls.h $
 * 
 * 3     10/22/97 11:56a Darinh
 * Changes to make multiple board installations work better.
 * 
 * 2     6/06/97 1:48p Darinh
 * Everything seems functional, but more testing is required.
 * 
 * 1     4/02/97 10:08a Darinh
 * Initial checkin; ISA cards initialize, but do not pass data.
 * 
--*/

#include <ntddk.h>

#ifndef _IOCTLS_H
#define _IOCTLS_H



//
//  SNADIS Ioctls
//
#define IOCTLSETEVENTHANDLE				0x410
#define IOCTLSETLINK					0x420
#define IOCTLGETV24STATUS				0x623
#define IOCTLSETV24OUTPUTSTATUS			0x430
#define IOCTLABORTTX					0x450
#define IOCTLABORTRX					0x460
#define IOCTLRXFRAME					0x632
#define IOCTLTXFRAME					0x441
#define IOCTLGETINTERFACERECORD			0x642
#define IOCTLSETINTERFACERECORD			0x610

//
// Input V.24 Status bit map (IV24_ )
//
#define IV24_CTS						0x01
#define IV24_DSR						0x02
#define IV24_DCD						0x04
#define IV24_RI							0x08
#define IV24_TEST						0x10

//
// Output V.24 Status bit map (OV24_ )
//
#define OV24_RTS						0x01
#define OV24_DTR						0x02
#define OV24_RATE_SELECT				0x04
#define OV24_SELECT						0x08
#define OV24_MAIN_TEST					0x10

//
// Set Link Characteristics - Link Options (LO_)
//
#define LO_RSTAT						0x02
#define LO_DMA							0x04
#define LO_CLOCK						0x08
#define LO_FDPLX						0x10
#define LO_HDLC							0x20
#define LO_NRZI							0x40
#define LO_4WIRE						0x80

#define DEFAULT_MIN_MAXDATA             0x010B  //2 + 9 + 256
#define DEFAULT_MAX_MAXDATA             ((DGSNA_MAX_PACKET_SIZE)+11)	// +2+9 for headers

//
// Device Link Characteristics structure definition
//
typedef struct _LINK_CHARACTERISTICS
{
	LONG	FrameSize;
	LONG	DataRate;
	UCHAR	StationAddress1;
	UCHAR	StationAddress2;
	UCHAR	LinkOptions;
	UCHAR	Reserved;
} LINKCHAR, *PLINKCHAR;


//
// INFO_ : Additional information error codes put in IoStatus.Information
//
#define INFO_CANT_ALLOCATE_SPINLOCK			1
#define INFO_CANT_CONNECT_INTERRUPT			2
#define INFO_HARDWARE_INIT_FAILURE			3
#define INFO_SET_EVENT_NO_EVENT				4
#define INFO_HARDWARE_CMD_TIMEOUT			5
#define INFO_LINKCHAR_BUF_WRONG_SIZE		6
#define INFO_FRAME_BUF_TOO_BIG				7
#define INFO_FRAME_BUF_TOO_SMALL			8
#define INFO_NO_CLOCKS						9
#define INFO_NO_DMA_FDX						10
#define INFO_CANT_ALLOCATE_MDL				11
#define INFO_CANT_ALLOCATE_MEMORY			12
#define INFO_DMA_BUFFER_UNUSABLE			14
#define INFO_TX_BUFFER_FULL					15
#define INFO_TX_FRAME_TOO_BIG				16
#define INFO_TX_FRAME_TOO_SMALL				17
#define INFO_READ_IR_BUFFER_WRONG_SIZE		18
#define INFO_NEEDS_MCA_BUS					19
#define INFO_NEEDS_ISA_BUS					20


#endif // _IOCTLS_H





