
/*****************************************************************************
 * Copyright (c) 1988-95 Digi International Inc., All Rights Reserved
 * 
 * This  software  contains  proprietary  and  confidential   information   of
 * Digi International  Inc.   By  accepting  transfer  of this copy, Recipient
 * agrees to retain this software in  confidence,  to  prevent  disclosure  to
 * others,  and  to make no  use of this software other than that for which it
 * was delivered.  This is an unpublished copyright work  Digi   International
 * Inc.    Except   as   permitted   by  federal  law,  17 USC 117, copying is
 * strictly prohibited.
 * 
 * Digi  International  Inc.  CONFIDENTIAL  -   (Digi    International    Inc.
 * Confidential  when   combined   with   the   aggregated  modules  for  this
 * product) OBJECT CODE ONLY SOURCE MATERIALS
 * 
 * (C) COPYRIGHT Digi International Inc. 1995
 * 
 * All Rights Reserved
 * 
 * US   Government   Users   Restricted   Rights   -   Use,   duplication   or
 * disclosure  restricted by GSA ADP Schedule Contract with Digi International
 * Inc.
 * 
 *****************************************************************************/

#define NUM_TRANSCEIVER_DEVS NUM_T1E1_DEVS 


/* Hawaii Device Register Locations */
#define	TRANSCEIVER_CR1		((uint8)(16))
#define TRANSCEIVER_CR2		((uint8)(17))
#define TRANSCEIVER_CR3		((uint8)(18))
#define	TRANSCEIVER_ICR		((uint8)(19))
#define	TRANSCEIVER_TSR		((uint8)(20))
#define	TRANSCEIVER_PSR		((uint8)(21))
#define	TRANSCEIVER_ESR		((uint8)(22))
#define	TRANSCEIVER_CR4		((uint8)(23))

#define	GPP0_HAWAII_SERIAL_PORT 0xA2000000

#define GPP0_HSC1 0x8
#define	GPP0_HSC0 0x4
#define	GPP0_HSCK 0x2
#define	GPP0_HDI  0x1
#define GPP0_HDO  0x1

#define GPP0_HSCK_1 GPP0_HSCK 
#define GPP0_HSCK_0 0

#define	HAWAII_CR1_EC0		0x01
#define HAWAII_CR1_EC1 		0x02
#define HAWAII_CR1_EC2 		0x04
#define HAWAII_CR1_EC3 		0x08
/*
 * FRENCH SPECIAL
 */
#define HAWAII_CR1_EC4 		0x09
#define HAWAII_CR1_EC5 		0x0A
#define HAWAII_CR1_UNP 		0x10
#define HAWAII_CR1_ENCENB 	0x20
#define	HAWAII_CR1_JASELTX	0x40
#define	HAWAII_CR1_JASELRX	0xc0

#define HAWAII_CR2_ERLOOP	0x01
#define	HAWAII_CR2_ELLOOP	0x02
#define	HAWAII_CR2_EALOOP	0x04
#define	HAWAII_CR2_ENLOOP	0x08
#define	HAWAII_CR2_ETAOS	0x10
#define	HAWAII_CR2_EQRSS	0x40
#define	HAWAII_CR2_EILU		0x20
#define	HAWAII_CR2_EILD		0x60
#define	HAWAII_CR2_PAT01	0x60
#define	HAWAII_CR2_RESET	0x80

#define	HAWAII_CR3_ESJAM	0x01
#define	HAWAII_CR3_ESCEN	0x02
#define	HAWAII_CR3_ES64		0x04
#define	HAWAII_CR3_SBIST	0x20
#define	HAWAII_CR3_JA6HZ	0x80

#define	HAWAII_ICR_CLOS		0x01
#define	HAWAII_ICR_CNLOOP	0x02
#define	HAWAII_ICR_CAIS		0x04
#define	HAWAII_ICR_CQRSS	0x08
#define	HAWAII_ICR_CDFMS	0x10
#define	HAWAII_ICR_CDFMO	0x20
#define	HAWAII_ICR_CESO		0x40
#define	HAWAII_ICR_CESU		0x80

#define HAWAII_TSR_TLOS		0x01
#define	HAWAII_TSR_TNLOOP	0x02
#define	HAWAII_TSR_TAIS		0x04
#define	HAWAII_TSR_TQRSS	0x08
#define	HAWAII_TSR_TDFMS	0x10
#define	HAWAII_TSR_TDFMO	0x20
#define	HAWAII_TSR_ESOVR	0x40
#define	HAWAII_TSR_ESUNF	0x80

#define	HAWAII_PSR_LOS		0x01
#define	HAWAII_PSR_NLOOP	0x02
#define	HAWAII_PSR_AIS		0x04
#define	HAWAII_PSR_QRSS		0x08
#define	HAWAII_PSR_DFMS		0x10
#define	HAWAII_PSR_DFMO		0x20
#define	HAWAII_PSR_BIST		0x40

#define	HAWAII_ESR_LA0DB	0x00
#define	HAWAII_ESR_LA10DB	0x80
#define	HAWAII_ESR_LA20DB	0x40
#define	HAWAII_ESR_LA32DB	0xC0

#define	HAWAII_CR4_CODEV	0x01
#define	HAWAII_CR4_ZEROV	0x02
#define	HAWAII_CR4_LOS2048	0x04
#define	HAWAII_CR4_COL12P5	0x08

typedef struct {

	int	Channel ;
	uint32	state ;
	
	uint32	cur_status ;	/* Current Status */
	uint32	cum_status ;	/* Or'ed cummulative status over an interval */

	uint32	stat_prev ;	/* Previous Status */	

	uint32	event_flags ;	/* CSU Event Flags mask */

	uint32	events_device ;	/* device to send events to */

	uint8	cr1_reg ; /* Shadow of values written to control Reg #1 */
	uint8	cr2_reg ; /* Shadow of values written to control Reg #2 */
	uint8	cr3_reg ; /* Shadow of values written to control Reg #3 */
	uint8	cr4_reg ; /* Shadow of values written to control Reg #4 */
	uint8	icr_reg ; /* Shadow of values written to Int. Clear Reg */
 
} transceiver_t ;

transceiver_t	*transceiver_init(int Channel) ;
void		JitterAttSelect(transceiver_t *tp, uint8 Mode) ;
void		EqualiserControl(transceiver_t *tp, uint8 Eq) ;
uint8		ReadRxAtten(transceiver_t *tp) ;

/*
 * Externalised values used for Mode when calling JitterAttSelect().
 */
#define	JA_NONE	0
#define	JA_TX	HAWAII_CR1_JASELTX
#define	JA_RX	HAWAII_CR1_JASELRX

/*
 * Externalised values for Eq when calling EqualiserControl().
 */
#define	EQ_SHORT_HAUL	HAWAII_CR1_EC3
#define	EQ_LOW_GAIN	HAWAII_CR1_EC0
