
/*
 Copyright 1999 by Digi International (www.digi.com)

 This program is free software; you can redistribute it and/or modify
 it under the terms of the GNU General Public License as published by
 the Free Software Foundation; either version 2, or (at your option)
 any later version.
 
 This program is distributed in the hope that it will be useful,
 but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the 
 implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR 
 PURPOSE.  See the GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License
 along with this program; if not, write to the Free Software
 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

/*
 *	$Id: rap2mmap.h,v 1.10 1999/09/03 15:27:25 dickl Exp $
 *
 *	This file is used by both the linker directives and sometimes by
 *	mere source code.  Absolutely the only thing that can be in here
 *	are #defines of constants and #ifdefs.  NO C CODE!!!!!
 */

#ifndef	_RAP2MMAP_
#define	_RAP2MMAP_
#endif

/*
 * Offsets in RAM interesting to both host and the embedded processor.
 */
#define	GLOBAL_DEBUG_OFFSET	0x0200
#define	GLOBAL_DATA_OFFSET	0x1000
#define	GLOBAL_HOST_OFFSET	0x1004
#define	GLOBAL_ENDIAN_OFFSET	0x1008

#define	FEP_CODE_OFFSET		0x2000

/*
 *  This is the location (zero-relative) address of the stored exception
 *  vectors.   It has a relatively coarse resolution on RAP-II and ultimately
 *  is used by install_exc_vecs and for programming the exception vector
 *  remapping via the CPU Address Map register.
 *
 *  This (sadly) has to be exposed to both processors becuase the host
 *  has to program the exception offset so it can bootstrap the processor.
 *  This number *has* to be coordinated with the memory map of the target 
 *  and with the linker script.
 */
#define BASE_EXCEPTION_ADDRESS	0x00000
#define  BASE_EXC_SHIFT 	18  /* # of bits to shift into cpu_addr_map */


/* 
 * Absolute addresses interesting only to the embedded processor.
 */
#define DP_RAM_ADDR		0xa0000000
#define REGISTER_BUS		0xb0000000

#define MBOX_REGS_OFF		0x0000
#define	SRAM_OFF		0x4000
#define SRAM_SIZE		0x2000
#define PCI_DMAC_OFF		0x8100
#define	PCI_REGS_OFF		0x8150
#define MEM_CTRLLER_OFF		0x8200
#define CPU_REGS_OFF		0x8400
#define WAN_CTRL_REGS_OFF	0x8600
#define	GPIO_REGS_OFF		0x8800
#define RTC_REGS_OFF		0x8A00
#define TIMER_REGS_OFF		0x8B00
#define	FIFO_REGS_OFF		0x8C00
#define	UTOPIA_REGS_OFF		0x8E00
#define SWC_REGS_OFF		0x9000
#define	ETHERNET_REGS_OFF	0xA800
#define DMAC_REGS_OFF		0xC000
#define	OCM_OFF			0x10000
#define	PHY_OFF			0x9000000

#define	OCM_SIZE		0x400

#define SYS_CONFIG_REGISTER	0xBFFF0000

