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LD pd,ps+IX     Load     Rabbit 4000/5000 Instruction

Opcode	Instruction	Operation
--	LD pd,ps+IX	pd = ps + IX
6D 04	LD PW,PW+IX	PW = PW + IX
6D 14	LD PW,PX+IX	PW = PX + IX
6D 24	LD PW,PY+IX	PW = PY + IX
6D 34	LD PW,PZ+IX	PW = PZ + IX
6D 44	LD PX,PW+IX	PX = PW + IX
6D 54	LD PX,PX+IX	PX = PX + IX
6D 64	LD PX,PY+IX	PX = PY + IX
6D 74	LD PX,PZ+IX	PX = PZ + IX
6D 84	LD PY,PW+IX	PY = PW + IX
6D 94	LD PY,PX+IX	PY = PX + IX
6D A4	LD PY,PY+IX	PY = PY + IX
6D B4	LD PY,PZ+IX	PY = PZ + IX
6D C4	LD PZ,PW+IX	PZ = PW + IX
6D D4	LD PZ,PX+IX	PZ = PX + IX
6D E4	LD PZ,PY+IX	PZ = PY + IX
6D F4	LD PZ,PZ+IX	PZ = PZ + IX

Clocks	8-Bit Access	16-Bit Unaligned	16-Bit Aligned
Rabbit 4000	4	n/a	n/a
Rabbit 5000	4	4	2

Flags				ALTD			IOI/IOE
S	Z	L/V	C	F	R	SP	S	D
-	-	-	-		·

Description

Loads pd (any of the 32-bit registers PW, PX, PY or PZ) with the sum of ps (any of PW, PX, PY or PZ) and IX. These instructions cannot be used for general 32-bit arithmetic because the addition depends on the upper two bytes of ps. If the upper two bytes are all ones, then it is 16-bit addition. The following example illustrates this point:

ld PW,0xFFFFFFFF
ld PW,PW+IX            ;yields PW=0xFFFF0000 if IX=1

ld PW,0x7FFFFFFF
ld PW,PW+IX            ;yields PW=0x80000000 if IX=1