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LD (pd+d),ps     Load     Rabbit 4000/5000 Instruction

Opcode	Instruction	Operation
--	LD (pd+d),ps	(pd+d)=ps0; (pd+d+1)=ps1 (pd+d+2)=ps2; (pd+d+3)=ps3
6D 09 d 6D 19 d 6D 29 d 6D 39 d	LD (PW+d),PW LD (PX+d),PW LD (PY+d),PW LD (PZ+d),PW	(pd+d)=PW0; (pd+d+1)=PW1 (pd+d+2)=PW2; (pd+d+3)=PW3
6D 49 d 6D 59 d 6D 69 d 6D 79 d	LD (PW+d),PX LD (PX+d),PX LD (PY+d),PX LD (PZ+d),PX	(pd+d)=PX0; (pd+dL+1)=PX1 (pd+d+2)=PX2; (pd+d+3)=PX3
6D 89 d 6D 99 d 6D A9 d 6D B9 d	LD (PW+d),PY LD (PX+d),PY LD (PY+d),PY LD (PZ+d),PY	(pd+d)=PY0; (pd+d+1)=PY1 (pd+d+2)=PY2; (pd+d+3)=PY3
6D C9 d 6D D9 d 6D E9 d 6D F9 d	LD (PW+d),PZ LD (PX+d),PZ LD (PY+d),PZ LD (PZ+d),PZ	(pd+d)=PZ0; (pd+d+1)=PZ1 (pd+d+2)=PZ2; (pd+d+3)=PZ3

Clocks	8-Bit Access	16-Bit Unaligned	16-Bit Aligned
Rabbit 4000	19	n/a	n/a
Rabbit 5000	20	19	18

Flags				ALTD			IOI/IOE
S	Z	L/V	C	F	R	SP	S	D
-	-	-	-

Description

Loads the memory location whose address is computed as the sum of pd and the 8-bit signed displacement d with ps.

The address is treated either as a logical address that will be passed through the MMU for translation into a physical address or as a physical address that does not need MMU translation. If pd is 0xFFFFxxxx, i.e., the upper 16 bits are all ones, it represents a logical address. This is called a "long logical" address. Otherwise, it is a physical address with the low 20 bits or 24 bits being significant (depending on the memory available).