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SRL bb,BCDE
SRL bb,JKHL     Shift Right Logical     Rabbit 4000/5000 Instruction

Opcode	Instruction	Operation
----	SRL bb,BCDE	BCDE = {0,BCDE[31,1]}   CF = E[0]   bb = bb - 1 repeat while bb != 0
DD B8	SRL 1,BCDE	repeat the operation 1 time
DD B9	SRL 2,BCDE	repeat the operation 2 times
DD BB	SRL 4,BCDE	repeat the operation 4 times
----	SRL bb,JKHL	JKHL = {0,JKHL[31,1]}   CF = L[0]   bb= bb - 1 repeat while bb != 0
FD B8	SRL 1,JKHL	repeat the operation 1 time
FD B9	SRL 2,JKHL	repeat the operation 2 times
FD BB	SRL 4,JKHL	repeat the operation 4 times

Clocks	8-Bit Access	16-Bit Unaligned	16-Bit Aligned
Rabbit 4000	4	n/a	n/a
Rabbit 5000	4	4	2

Flags				ALTD			IOI/IOE
S	Z	L/V	C	F	R	SP	S	D
·	·	L	·	·	·

Description

Shifts to the right the bits of the data in register BCDE or JKHL. Bits 1 through 31 are each shifted to the next lowest-order bit position (bit 31 moves to bit 30, etc.). The lowest-order bit (bit 0 of E or L) is shifted to the C flag.

Figure 23: The bit logic of the SRL instruction.

The instruction repeats bb number of times, which can be 1, 2 or 4.