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SRL r     Shift Right Logical     Rabbit 2000/3000/4000/5000 Instruction

Opcode	Instruction	Operation
----	SRL r	r = {0,r[7,1]}; CF = r[0]
CB 3F	SRL A	A = {0,A[7,1]}; CF = A[0]
CB 38	SRL B	B = {0,B[7,1]}; CF = B[0]
CB 39	SRL C	C = {0,C[7,1]}; CF = C[0]
CB 3A	SRL D	D = {0,D[7,1]}; CF = D[0]
CB 3B	SRL E	E = {0,E[7,1]}; CF = E[0]
CB 3C	SRL H	H = {0,H[7,1]}; CF = H[0]
CB 3D	SRL L	L = {0,L[7,1]}; CF = L[0]

Clocks	8-Bit Access	16-Bit Unaligned	16-Bit Aligned
Rabbit 2000/3000/4000	4	n/a	n/a
Rabbit 5000	4	4	2

Flags				ALTD			IOI/IOE
S	Z	L/V	C	F	R	SP	S	D
·	·	L	·	·	·

Description

Shifts to the right the bits in r (any of the registers A, B, C, D, E, H, or L). Each bit is shifted to the next lowest-order bit position (Bit 7 shifts to bit 6, etc.) Bit 0 shifts to the C flag. Bit 7 is reset. See the figure below.

Figure 24: The bit logic of the SRL instruction.