Table of Contents
- 1.1 Introduction
- 1.2 Features
- 1.3 Block Diagram
- 1.4 Basic Specifications
- 1.5 Comparing Rabbit Microprocessors
- 2.1 Overview
- 2.1.1 Block Diagram
- 2.1.2 Registers
- 2.2 Dependencies
- 2.2.1 I/O Pins
- 2.2.2 Other Registers
- 2.3 Operation
- 2.3.1 Main Clock
- 2.3.2 Spectrum Spreader
- 2.3.3 Clock Doubler
- 2.3.4 32 kHz Clock
- 2.4 Register Descriptions
- 3.1 Overview
- 3.1.1 Block Diagram
- 3.1.2 Registers
- 3.2 Dependencies
- 3.2.1 I/O Pins
- 3.2.2 Clocks
- 3.2.3 Other Registers
- 3.2.4 Interrupts
- 3.3 Operation
- 3.4 Register Descriptions
- 4.1 Overview
- 4.1.1 Block Diagram
- 4.1.2 Registers
- 4.2 Dependencies
- 4.2.1 I/O Pins
- 4.2.2 Clocks
- 4.2.3 Interrupts
- 4.3 Operation
- 4.3.1 Periodic Interrupt
- 4.3.2 Real-Time Clock
- 4.3.3 Watchdog Timer
- 4.3.4 Secondary Watchdog Timer
- 4.4 Register Descriptions
- 5.1 Overview
- 5.1.1 Block Diagram
- 5.1.2 Registers
- 5.2 Dependencies
- 5.2.1 I/O Pins
- 5.2.2 Clocks
- 5.2.3 Other Registers
- 5.2.4 Interrupts
- 5.3 Operation
- 5.3.1 Memory Management Unit (MMU)
- 5.3.2 8-bit Operation
- 5.3.3 16-bit and Page Modes
- 5.3.4 Separate Instruction and Data Space
- 5.3.5 Memory Protection
- 5.3.6 Stack Protection
- 5.4 Register Descriptions
- 6.1 Overview
- 6.2 Operation
- 6.3 Interrupt Tables
- 7.1 Overview
- 7.2 Block Diagram
- 7.2.1 Registers
- 7.3 Dependencies
- 7.3.1 I/O Pins
- 7.3.2 Clocks
- 7.3.3 Interrupts
- 7.4 Operation
- 7.4.1 Example ISR
- 7.5 Register Descriptions
- 8.1 Overview
- 8.1.1 Block Diagram
- 8.1.2 Registers
- 8.2 Dependencies
- 8.2.1 I/O Pins
- 8.2.2 Clocks
- 8.2.3 Other Registers
- 8.2.4 Interrupts
- 8.3 Operation
- 8.4 Register Descriptions
- 9.1 Overview
- 9.1.1 Block Diagram
- 9.1.2 Registers
- 9.2 Dependencies
- 9.2.1 I/O Pins
- 9.2.2 Clocks
- 9.2.3 Other Registers
- 9.2.4 Interrupts
- 9.3 Operation
- 9.4 Register Descriptions
- 10.1 Overview
- 10.1.1 Block Diagram
- 10.1.2 Registers
- 10.2 Dependencies
- 10.2.1 I/O Pins
- 10.2.2 Clocks
- 10.2.3 Other Registers
- 10.2.4 Interrupts
- 10.3 Operation
- 10.4 Register Descriptions
- 11.1 Overview
- 11.1.1 Block Diagram
- 11.1.2 Registers
- 11.2 Dependencies
- 11.2.1 I/O Pins
- 11.2.2 Clocks
- 11.2.3 Other Registers
- 11.2.4 Interrupts
- 11.3 Operation
- 11.4 Register Descriptions
- 12.1 Overview
- 12.1.1 Block Diagram
- 12.1.2 Registers
- 12.2 Dependencies
- 12.2.1 I/O Pins
- 12.2.2 Clocks
- 12.2.3 Other Registers
- 12.2.4 Interrupts
- 12.3 Operation
- 12.4 Register Descriptions
- 13.1 Overview
- 13.1.1 Block Diagram
- 13.1.2 Registers
- 13.2 Dependencies
- 13.2.1 I/O Pins
- 13.2.2 Clocks
- 13.2.3 Other Registers
- 13.2.4 Interrupts
- 13.3 Operation
- 13.3.1 Handling Interrupts
- 13.3.2 Example ISR
- 13.4 Register Descriptions
- 14.1 Overview
- 14.1.1 Block Diagram
- 14.1.2 Registers
- 14.2 Dependencies
- 14.2.1 I/O Pins
- 14.2.2 Clocks
- 14.2.3 Other Registers
- 14.2.4 Interrupts
- 14.3 Operation
- 14.3.1 Handling Interrupts
- 14.3.2 Example ISR
- 14.4 Register Descriptions
- 15.1 Overview
- 15.1.1 Block Diagram
- 15.1.2 Registers
- 15.2 Dependencies
- 15.2.1 I/O Pins
- 15.2.2 Clocks
- 15.2.3 Other Registers
- 15.2.4 Interrupts
- 15.3 Operation
- 15.3.1 Handling Interrupts
- 15.3.2 Example ISR
- 15.4 Register Descriptions
- 16.1 Overview
- 16.1.1 Block Diagram
- 16.1.2 Registers
- 16.2 Dependencies
- 16.2.1 I/O Pins
- 16.2.2 Clocks
- 16.2.3 Other Registers
- 16.2.4 Interrupts
- 16.3 Operation
- 16.3.1 Asynchronous Mode
- 16.3.2 Clocked Serial Mode
- 16.4 Register Descriptions
- 17.1 Overview
- 17.1.1 Block Diagram
- 17.1.2 Registers
- 17.2 Dependencies
- 17.2.1 I/O Pins
- 17.2.2 Clocks
- 17.2.3 Other Registers
- 17.2.4 Interrupts
- 17.3 Operation
- 17.3.1 Asynchronous Mode
- 17.3.2 HDLC Mode
- 17.3.3 More on Clock Synchronization and Data Encoding
- 17.4 Register Descriptions
- 18.1 Overview
- 18.1.1 Block Diagram
- 18.1.2 Registers
- 18.2 Dependencies
- 18.2.1 I/O Pins
- 18.2.2 Clocks
- 18.2.3 Interrupts
- 18.3 Operation
- 18.3.1 Master Setup
- 18.3.2 Slave Setup
- 18.3.3 Master/Slave Communication
- 18.3.4 Slave/Master Communication
- 18.3.5 Handling Interrupts
- 18.3.6 Example ISR
- 18.3.7 Other Configurations
- 18.3.8 Timing Diagrams
- 18.4 Register Descriptions
- 19.1 Overview
- 19.1.1 Block Diagram
- 19.1.2 Registers
- 19.2 Dependencies
- 19.2.1 I/O Pins
- 19.2.2 Clocks
- 19.2.3 Interrupts
- 19.3 Operation
- 19.3.1 Handling Interrupts
- 19.3.2 Example ISR
- 19.3.3 DMA Priority with the Processor
- 19.3.4 DMA Channel Priority
- 19.3.5 Buffer Descriptor Modes
- 19.3.5.1 Single Buffer
- 19.3.5.2 Buffer Array
- 19.3.5.3 Linked List
- 19.3.5.4 Circular Queue
- 19.3.5.5 Linked Array
- 19.3.6 DMA with Peripherals
- 19.3.6.1 DMA with HDLC Serial Ports
- 19.3.6.2 DMA with Ethernet
- 19.3.6.3 DMA with PWM and Timer C
- 19.3.7 DMA Bug Workarounds (Appendix B.2)
- 19.3.7.1 DMA/HDLC/Ethernet Interaction
- 19.3.8 DMA/Block Copy Interaction
- 19.3.9 Single-Byte DMA Requests to internal I/O Registers
- 19.4 Register Descriptions
- 20.1 Overview
- 20.1.1 Block Diagram
- 20.1.2 Registers
- 20.2 Dependencies
- 20.2.1 I/O Pins
- 20.2.2 Clocks
- 20.2.3 Other Registers
- 20.2.4 Interrupts
- 20.3 Operation
- 20.3.1 Setup
- 20.3.2 Transmit
- 20.3.3 Receive
- 20.3.4 Handling Interrupts
- 20.3.5 Multicast Addressing
- 20.4 Ethernet Interface Circuit
- 20.5 Register Descriptions
- 21.1 Overview
- 21.1.1 Input-Capture Mode
- 21.1.2 Input-Count Mode
- 21.1.3 Block Diagram
- 21.1.4 Registers
- 21.2 Dependencies
- 21.2.1 I/O Pins
- 21.2.2 Clocks
- 21.2.3 Other Registers
- 21.2.4 Interrupts
- 21.3 Operation
- 21.3.1 Input-Capture Channel
- 21.3.2 Handling Interrupts
- 21.3.3 Example ISR
- 21.3.4 Capture Mode
- 21.3.5 Count Mode
- 21.4 Register Descriptions
- 22.1 Overview
- 22.1.1 Block Diagram
- 22.1.2 Registers
- 22.2 Dependencies
- 22.2.1 I/O Pins
- 22.2.2 Clocks
- 22.2.3 Other Registers
- 22.2.4 Interrupts
- 22.3 Operation
- 22.3.1 Handling Interrupts
- 22.3.2 Example ISR
- 22.4 Register Descriptions
- 23.1 Overview
- 23.1.1 Block Diagram
- 23.1.2 Registers
- 23.2 Dependencies
- 23.2.1 I/O Pins
- 23.2.2 Clocks
- 23.2.3 Other Registers
- 23.2.4 Interrupts
- 23.3 Operation
- 23.3.1 Handling Interrupts
- 23.3.2 Example ISR
- 23.4 Register Descriptions
- 24.1 Overview
- 24.1.1 Auxiliary I/O Bus
- 24.1.2 I/O Strobes
- 24.1.3 I/O Handshake
- 24.1.4 Block Diagram
- 24.1.5 Registers
- 24.2 Dependencies
- 24.2.1 I/O Pins
- 24.2.2 Clocks
- 24.2.3 Other Registers
- 24.2.4 Interrupts
- 24.3 Operation
- 24.3.1 Auxiliary I/O Bus
- 24.3.2 I/O Strobes
- 24.3.3 I/O Handshake
- 24.4 Register Descriptions
- 25.1 Overview
- 25.1.1 Block Diagram
- 25.1.2 Registers
- 25.2 Dependencies
- 25.2.1 I/O Pins
- 25.2.2 Clocks
- 25.2.3 Other Registers
- 25.2.4 Interrupts
- 25.3 Operation
- 25.3.1 Handling Interrupts
- 25.3.2 Example ISR
- 25.4 Register Descriptions
- 26.1 Overview
- 26.1.1 Registers
- 26.2 Operation
- 26.2.1 Unused Pins
- 26.2.2 Clock Rates
- 26.2.3 Short Chip Selects
- 26.2.4 Self-Timed Chip Selects
- 26.3 Register Descriptions
- 27.1 Overview
- 27.1.1 Registers
- 27.2 Dependencies
- 27.2.1 I/O Pins
- 27.2.2 Clocks
- 27.2.3 Other Registers
- 27.2.4 Interrupts
- 27.3 Operation
- 27.3.1 Memory Protection Only
- 27.3.2 Mixed System/User Mode Operation
- 27.3.3 Complete Operating System
- 27.3.4 Enabling the System/User Mode
- 27.3.5 System/User Mode Instructions
- 27.3.6 System Mode Violation Interrupt
- 27.3.7 Handling Interrupts in the System/User Mode
- 27.4 Register Descriptions
- 28.1 DC Characteristics
- 28.2 AC Characteristics
- 28.3 Memory Access Times
- 28.3.1 Memory Reads
- 28.3.2 Memory Writes
- 28.3.3 External I/O Reads
- 28.3.4 External I/O Writes
- 28.3.5 Memory Access Times
- 28.4 Clock Speeds
- 28.4.1 Recommended Clock/Memory Configurations
- 28.5 Power and Current Consumption
- 28.5.1 Sleepy Mode Current Consumption
- 28.5.2 Battery-Backed Clock Current Consumption
- 29.1 LQFP Package
- 29.1.1 Pinout
- 29.1.2 Mechanical Dimensions and Land Pattern
- 29.2 Ball Grid Array Package
- 29.2.1 Pinout
- 29.2.2 Mechanical Dimensions and Land Pattern
- 29.3 Rabbit Pin Descriptions
- A.1 Alternate Parallel Port Pin Outputs
- A.2 Alternate Parallel Port Pin Inputs
- B.1 ESD Sensitivity
- B.1.1 ESD Design Guidelines
- B.2 Bugs