Table of Contents
- 1.1 Features and Specifications
- 1.2 Summary of Rabbit Advantages
- 2.1 The Rabbit 8-bit Processor vs. 16-bit and 32-bit Processors
- 2.2 Overview of On-Chip Peripherals
- 2.2.1 Serial Ports
- 2.2.2 System Clock
- 2.2.3 Time/Date Oscillator
- 2.2.4 Parallel I/O
- 2.2.5 Slave Port
- 2.2.6 Timers
- 2.3 Design Standards
- 2.3.1 Programming Port
- 2.3.2 Standard BIOS
- 2.4 Dynamic C Support for the Rabbit
- 3.1 Processor Registers
- 3.2 Memory Mapping
- 3.2.1 Extended Code Space
- 3.2.2 Extending Data Memory
- 3.2.3 Practical Memory Considerations
- 3.3 Instruction Set Outline
- 3.3.1 Load Immediate Data To a Register
- 3.3.2 Load or Store Data from or to a Constant Address
- 3.3.3 Load or Store Data Using an Index Register
- 3.3.4 Register to Register Move
- 3.3.5 Register Exchanges
- 3.3.6 Push and Pop Instructions
- 3.3.7 16-bit Arithmetic and Logical Ops
- 3.3.8 Input/Output Instructions
- 3.4 How to Do It in Assembly Language--Tips and Tricks
- 3.4.1 Zero HL in 4 Clocks
- 3.4.2 Exchanges Not Directly Implemented
- 3.4.3 Manipulation of Boolean Variables
- 3.4.4 Comparisons of Integers
- 3.4.5 Atomic Moves from Memory to I/O Space
- 3.5 Interrupt Structure
- 3.5.1 Interrupt Priority
- 3.5.2 Multiple External Interrupting Devices
- 3.5.3 Privileged Instructions, Critical Sections and Semaphores
- 3.5.4 Critical Sections
- 3.5.5 Semaphores Using Bit B,(HL)
- 3.5.6 Computed Long Calls and Jumps
- 4.1 Precisely Timed Output Pulses
- 4.1.1 Pulse Width Modulation to Reduce Relay Power
- 4.2 Open-Drain Outputs Used for Key Scan
- 4.3 Cold Boot
- 4.4 The Slave Port
- 4.4.1 Slave Rabbit As A Protocol UART
- 5.1 Package Schematic and Pinout
- 5.2 Package Mechanical Dimensions
- 5.3 Rabbit Pin Descriptions
- 5.4 Bus Timing
- 5.5 Description of Pins with Alternate Functions
- 5.6 DC Characteristics
- 5.6.1 5.0 Volts
- 5.6.2 3.3 Volts
- 5.7 I/O Buffer Sourcing and Sinking Limit
- 7.1 Rabbit Oscillators and Clocks
- 7.2 Clock Doubler
- 7.3 Controlling Power Consumption
- 7.4 Output Pins CLK, STATUS, /WDTOUT, /BUFEN
- 7.5 Time/Date Clock (Real-Time Clock)
- 7.6 Watchdog Timer
- 7.7 System Reset
- 7.8 Rabbit Interrupt Structure
- 7.8.1 External Interrupts
- 7.8.2 Interrupt Vectors: INT0 - EIR,00h/INT1 - EIR,08h
- 7.9 Bootstrap Operation
- 8.1 Memory-Mapping Unit
- 8.2 Memory Interface Unit
- 8.3 Memory Bank Control Registers
- 8.3.1 Optional A16, A19 Inversions by Segment (/CS1 Enable)
- 8.4 Allocation of Extended Code and Data
- 8.5 How Compiler Compiles to Memory
- 9.1 Parallel Port A
- 9.2 Parallel Port B
- 9.3 Parallel Port C
- 9.4 Parallel Port D
- 9.5 Parallel Port E
- 11.1 Timer A
- 11.1.1 Timer A I/O Registers
- 11.1.2 Practical Use of Timer A
- 11.2 Timer B
- 11.2.1 Using Timer B
- 12.1 Register Layout Serial Port
- 12.2 Serial Port Interrupt
- 12.3 Transmit Serial Data Timing
- 12.4 Receive Serial Data Timing
- 12.5 Clocked Serial Ports
- 12.6 Clocked Serial Timing
- 12.6.1 Clocked Serial Timing With Internal Clock
- 12.6.2 Clocked Serial Timing with External Clock
- 12.7 Serial Port Software Suggestions
- 12.7.1 Controlling an RS-485 Driver and Receiver
- 12.7.2 Transmitting Dummy Characters
- 12.7.3 Transmitting and Detecting a Break
- 12.7.4 Using A Serial Port to Generate a Periodic Interrupt
- 12.7.5 Extra Stop Bits, Sending Parity, 9th Bit Communication Schemes
- 12.7.6 Supporting 9th Bit Communication Protocols
- 12.7.7 Rabbit-Only Master/Slave Protocol
- 12.7.8 Data Framing/Modbus
- 13.1 Hardware Design of Slave Port Interconnection
- 13.2 Slave Port Registers
- 13.3 Applications and Communications Protocols for Slaves
- 13.3.1 Slave Applications
- 13.3.2 Master-Slave Messaging Protocol
- 14.1 Low-Power Design
- 15.1 Current Consumption
- 16.1 The BIOS
- 16.1.1 BIOS Services
- 16.1.2 BIOS Assumptions
- 16.2 Virtual Driver
- 16.2.1 Periodic Interrupt
- 16.2.2 Watchdog Timer Support
- 17.1 Power Management Support
- 17.2 Reading and Writing I/O Registers
- 17.2.1 Using Assembly Language
- 17.2.2 Using Library Functions
- 17.3 Shadow Registers
- 17.3.1 Updating Shadow Registers
- 17.3.2 Interrupt While Updating Registers
- 17.3.3 Write-only Registers Without Shadow Registers
- 17.4 Timer and Clock Usage
- 18.1 Load Immediate Data
- 18.2 Load & Store to Immediate Address
- 18.3 8-bit Indexed Load and Store
- 18.4 16-bit Indexed Loads and Stores
- 18.5 16-bit Load and Store 20-bit Address
- 18.6 Register to Register Moves
- 18.7 Exchange Instructions
- 18.8 Stack Manipulation Instructions
- 18.9 16-bit Arithmetic and Logical Ops
- 18.10 8-bit Arithmetic and Logical Ops
- 18.11 8-bit Bit Set, Reset and Test
- 18.12 8-bit Increment and Decrement
- 18.13 8-bit Fast A register Operations
- 18.14 8-bit Shifts and Rotates
- 18.15 Instruction Prefixes
- 18.16 Block Move Instructions
- 18.17 Control Instructions - Jumps and Calls
- 18.18 Miscellaneous Instructions
- 18.19 Privileged Instructions
- A.1 The Rabbit Programming Port
- A.2 Use of the Programming Port as a Diagnostic/Setup Port
- A.3 Alternate Programming Port
- A.4 Suggested Rabbit Crystal Frequencies
- B.1 Default Values for all the Peripheral Control Registers